+---------------------+--------------------------------+ | Type | Value | +=====================+================================+ | Socketed flash | no | +---------------------+--------------------------------+ | Size | 8 MiB + 4MiB | +---------------------+--------------------------------+ | In circuit flashing | Yes | +---------------------+--------------------------------+ | Package | SOIC-8 | +---------------------+--------------------------------+ | Write protection | No | +---------------------+--------------------------------+ | Dual BIOS feature | No | +---------------------+--------------------------------+ | Internal flashing | Yes | +---------------------+--------------------------------+
Please also have a look at :doc:`../../flash_tutorial/index`.
To split the coreboot.rom into two images (one for the 8MiB and one for the 4 MiB flash IC), run the following commands:
dd of=top.rom bs=1M if=build/coreboot.rom skip=8 dd of=bottom.rom bs=1M if=build/coreboot.rom count=8
That gives one ROM for each flash IC, where top.rom is the upper part of the flash image, that resides on the 4 MiB flash and bottom.rom is the lower part of the flash image, that resides on the 8 MiB flash.
If you flash externally you need to read both flash chips to get two images (one for the 8MiB and one for the 4 MiB flash IC), and then run the following command to concatenate the files:
cat bottom.rom top.rom > firmware.rom
There‘s one 8MiB and one 4 MiB flash which contains IFD, GBE, ME and BIOS region. These two flash ICs appear as a single 12MiB when flashing internally. On Lenovo’s UEFI the EC firmware update is placed at the start of the BIOS region. The update is then written into the EC once.