tree 160e8dc1e51584194bdda34b21aeedd5565719a3
parent d535a32c873d9fa38f1c90c31ca077b47a87df7d
author Duncan Laurie <dlaurie@chromium.org> 1481763457 -0800
committer chrome-bot <chrome-bot@chromium.org> 1481903517 -0800

UPSTREAM: google/eve: Enable native mode for UART pins in bootblock

Put the UART pins into native mode in bootblock so they are not
floating when we try to communicate with H1 over I2C.  Without
a serial console enabled BIOS these pins were not configured
until ramstage.

BUG=chrome-os-partner:60935
BRANCH=None

TEST=Boot Eve board without serial console and H1 TPM enabled

Signed-off-by: Duncan Laurie <dlaurie@chromium.org>
Reviewed-on: https://review.coreboot.org/17893
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Tested-by: build bot (Jenkins)
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>

Change-Id: I30f3bf0bacc1bbd776b351a9c09748b0601c39bc
Reviewed-on: https://chromium-review.googlesource.com/421173
Commit-Ready: Furquan Shaikh <furquan@chromium.org>
Tested-by: Furquan Shaikh <furquan@chromium.org>
Reviewed-by: Furquan Shaikh <furquan@chromium.org>