commit | 7030287db94ceff290f581f56d67fadd95a2d13e | [log] [tgz] |
---|---|---|
author | Miriam Polzer <mpolzer@google.com> | Thu Aug 11 06:38:46 2022 +0000 |
committer | Chromeos LUCI <chromeos-scoped@luci-project-accounts.iam.gserviceaccount.com> | Mon Sep 19 13:09:30 2022 +0000 |
tree | 703ee11b151c39637cb860a50e25492321b1240b | |
parent | 71ae74b33ee8f407d326c96fe4f6683fb3466187 [diff] |
UPSTREAM: security/vboot: Add rollback NVRAM space for TPM 2 Create an NVRAM space in TPM 2.0 that survives owner clear and can be read and written without authorization. This space allows to seal data with the TPM that can only be unsealed before the space was cleared. It will be used during ChromeOS enterprise rollback to securely carry data across a TPM clear. Public documentation on the rollback feature: https://source.chromium.org/chromium/chromiumos/platform2/+/main:oobe_config/README.md BUG=b/233746744 (cherry picked from commit 2c38933a0e461855c8eab997fc66baffa449f674) Original-Signed-off-by: Miriam Polzer <mpolzer@google.com> Original-Change-Id: I59ca0783b41a6f9ecd5b72f07de6fb403baf2820 Original-Reviewed-on: https://review.coreboot.org/c/coreboot/+/66623 Original-Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Original-Reviewed-by: Julius Werner <jwerner@chromium.org> GitOrigin-RevId: 2c38933a0e461855c8eab997fc66baffa449f674 Change-Id: I03b02863f15be46deeddd7bb32cb9f0d4a2946d8 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/third_party/coreboot/+/3903326 Tested-by: CopyBot Service Account <copybot.service@gmail.com> Commit-Queue: Patrick Georgi <pgeorgi@chromium.org> Reviewed-by: Patrick Georgi <pgeorgi@chromium.org>
coreboot is a Free Software project aimed at replacing the proprietary BIOS (firmware) found in most computers. coreboot performs a little bit of hardware initialization and then executes additional boot logic, called a payload.
With the separation of hardware initialization and later boot logic, coreboot can scale from specialized applications that run directly firmware, run operating systems in flash, load custom bootloaders, or implement firmware standards, like PC BIOS services or UEFI. This allows for systems to only include the features necessary in the target application, reducing the amount of code and flash space required.
coreboot was formerly known as LinuxBIOS.
After the basic initialization of the hardware has been performed, any desired “payload” can be started by coreboot.
See https://www.coreboot.org/Payloads for a list of supported payloads.
coreboot supports a wide range of chipsets, devices, and mainboards.
For details please consult:
ANY_TOOLCHAIN
Kconfig option if you’re feeling lucky (no support in this case).Optional:
make menuconfig
and make nconfig
)Please consult https://www.coreboot.org/Build_HOWTO for details.
If you want to test coreboot without any risks before you really decide to use it on your hardware, you can use the QEMU system emulator to run coreboot virtually in QEMU.
Please see https://www.coreboot.org/QEMU for details.
Further details on the project, a FAQ, many HOWTOs, news, development guidelines and more can be found on the coreboot website:
You can contact us directly on the coreboot mailing list:
https://www.coreboot.org/Mailinglist
The copyright on coreboot is owned by quite a large number of individual developers and companies. Please check the individual source files for details.
coreboot is licensed under the terms of the GNU General Public License (GPL). Some files are licensed under the “GPL (version 2, or any later version)”, and some files are licensed under the “GPL, version 2”. For some parts, which were derived from other projects, other (GPL-compatible) licenses may apply. Please check the individual source files for details.
This makes the resulting coreboot images licensed under the GPL, version 2.