commit | 2db366d33bed8ea71f667fe15a3f6e47750cb504 | [log] [tgz] |
---|---|---|
author | Angel Pons <th3fanbus@gmail.com> | Wed May 04 17:08:11 2022 +0200 |
committer | Chromeos LUCI <chromeos-scoped@luci-project-accounts.iam.gserviceaccount.com> | Fri May 06 22:40:30 2022 +0000 |
tree | f92e31a31f64f95a0dc0f55d2535915721100855 | |
parent | 5b6f3210d21f750574f236d0fd311ce5fbeacb43 [diff] |
UPSTREAM: soc/intel/tigerlake: Add enum for `DdiPortXConfig` Add an enum for `DdiPortXConfig` devicetree options. Note that setting these options to zero does not disable the corresponding DDI port, but instead indicates that no LFP (Local Flat Panel, i.e. internal LCD) is connected to it. Signed-off-by: Angel Pons <th3fanbus@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/64047 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org> Reviewed-by: Tim Crawford <tcrawford@system76.com> Original-Change-Id: I9ea10141e51bf29ea44199dcd1b55b63ec771c0a GitOrigin-RevId: da4e1d780656d6a733f7c2445697466c86a8e901 Change-Id: If32679faaa10721a0b17319af882ad2ed86e2af8 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/third_party/coreboot/+/3632379 Tested-by: CopyBot Service Account <copybot.service@gmail.com> Commit-Queue: Ricardo Quesada <ricardoq@chromium.org> Reviewed-by: Ricardo Quesada <ricardoq@chromium.org>
coreboot is a Free Software project aimed at replacing the proprietary BIOS (firmware) found in most computers. coreboot performs a little bit of hardware initialization and then executes additional boot logic, called a payload.
With the separation of hardware initialization and later boot logic, coreboot can scale from specialized applications that run directly firmware, run operating systems in flash, load custom bootloaders, or implement firmware standards, like PC BIOS services or UEFI. This allows for systems to only include the features necessary in the target application, reducing the amount of code and flash space required.
coreboot was formerly known as LinuxBIOS.
After the basic initialization of the hardware has been performed, any desired “payload” can be started by coreboot.
See https://www.coreboot.org/Payloads for a list of supported payloads.
coreboot supports a wide range of chipsets, devices, and mainboards.
For details please consult:
ANY_TOOLCHAIN
Kconfig option if you’re feeling lucky (no support in this case).Optional:
make menuconfig
and make nconfig
)Please consult https://www.coreboot.org/Build_HOWTO for details.
If you want to test coreboot without any risks before you really decide to use it on your hardware, you can use the QEMU system emulator to run coreboot virtually in QEMU.
Please see https://www.coreboot.org/QEMU for details.
Further details on the project, a FAQ, many HOWTOs, news, development guidelines and more can be found on the coreboot website:
You can contact us directly on the coreboot mailing list:
https://www.coreboot.org/Mailinglist
The copyright on coreboot is owned by quite a large number of individual developers and companies. Please check the individual source files for details.
coreboot is licensed under the terms of the GNU General Public License (GPL). Some files are licensed under the “GPL (version 2, or any later version)”, and some files are licensed under the “GPL, version 2”. For some parts, which were derived from other projects, other (GPL-compatible) licenses may apply. Please check the individual source files for details.
This makes the resulting coreboot images licensed under the GPL, version 2.