tree a55878c0e89befc167e045e11feb4fe08a29102a
parent e97f380389bc79eb4f464850cd0a8ebe6e45a1de
author Krishna Prasad Bhat <krishna.p.bhat.d@intel.com> 1641554091 +0530
committer Commit Bot <commit-bot@chromium.org> 1642667133 +0000

UPSTREAM: mb/intel/adlrvp: Add wake events for AC connect/disconnect

Enable S3/S0ix wake events for AC connect/disconnect on Alder Lake RVP.

BUG=None
BRANCH=None
TEST=Verify board wakes from S0ix on AC connect/disconnect.

Change-Id: I0d5db8161781e5e7bf12249fa3aa8a32be4bfccc
Signed-off-by: Nick Vaccaro <nvaccaro@google.com>
Original-Commit-Id: ba9183245fb42232132ddb5df804b8b8b5e76b82
Original-Change-Id: Iaf92821fd69a59624e58cb8af3896e2b6998723f
Original-Signed-off-by: Krishna Prasad Bhat <krishna.p.bhat.d@intel.com>
Original-Reviewed-on: https://review.coreboot.org/c/coreboot/+/60897
Original-Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Original-Reviewed-by: Rizwan Qureshi <rizwan.qureshi@intel.com>
Original-Reviewed-by: Paul Menzel <paulepanter@mailbox.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/third_party/coreboot/+/3399995
Reviewed-by: Rob Barnes <robbarnes@google.com>
Tested-by: Rob Barnes <robbarnes@google.com>
Commit-Queue: Rob Barnes <robbarnes@google.com>