| commit | 13c65556271d14a6982102df90b9d1286d6e00fa | [log] [tgz] |
|---|---|---|
| author | Bernardo Perez Priego <bernardo.perez.priego@intel.com> | Fri Oct 15 14:22:54 2021 -0700 |
| committer | Commit Bot <commit-bot@chromium.org> | Wed Dec 08 17:56:51 2021 +0000 |
| tree | 8835a7be8be9253b754cc8216c025398c6e8b233 | |
| parent | 9e673382fd86a41bb4be4f6b0dfacc9fddce32ab [diff] |
mb/google/brya: Update camera NVM parameters
Change HID name from INT3499 to PRP0001 along with size and
address width. Size decreased from 10K to 2K, address width
decreased from 14 to 8.
BUG=b:203014972
Test= Boot board and issue commands:
`cat /sys/bus/i2c/devices/i2c-PRP0001:02/eeprom >
./brya_imx208_eeprom.bin`
`hexdump -C brya_imx208_eeprom.bin > brya_imx208_eeprom_dump.log`
You should see the result in brya_imx208_eeprom_dump.log to be
same as module nvm file by vendor provided or meet the Intel nvm
calibration format.
(e.g. first 4 bytes be 0x01, 0x03, 0x01, 0x00)
Signed-off-by: Bernardo Perez Priego <bernardo.perez.priego@intel.com>
Change-Id: Ib2366ba4c8bb70d8cc82e64ca585b118a96260c0
Reviewed-on: https://review.coreboot.org/c/coreboot/+/58374
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
GitOrigin-RevId: 0f42e5e8f16bcd0ee1e853e095e7975762aafbc1
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/third_party/coreboot/+/3319068
Tested-by: Copybara Service <copybara-worker-blackhole@google.com>
Reviewed-by: Dossym Nurmukhanov <dossym@chromium.org>
Commit-Queue: Patrick Georgi <pgeorgi@chromium.org>
coreboot is a Free Software project aimed at replacing the proprietary BIOS (firmware) found in most computers. coreboot performs a little bit of hardware initialization and then executes additional boot logic, called a payload.
With the separation of hardware initialization and later boot logic, coreboot can scale from specialized applications that run directly firmware, run operating systems in flash, load custom bootloaders, or implement firmware standards, like PC BIOS services or UEFI. This allows for systems to only include the features necessary in the target application, reducing the amount of code and flash space required.
coreboot was formerly known as LinuxBIOS.
After the basic initialization of the hardware has been performed, any desired “payload” can be started by coreboot.
See https://www.coreboot.org/Payloads for a list of supported payloads.
coreboot supports a wide range of chipsets, devices, and mainboards.
For details please consult:
ANY_TOOLCHAIN Kconfig option if you’re feeling lucky (no support in this case).Optional:
make menuconfig and make nconfig)Please consult https://www.coreboot.org/Build_HOWTO for details.
If you want to test coreboot without any risks before you really decide to use it on your hardware, you can use the QEMU system emulator to run coreboot virtually in QEMU.
Please see https://www.coreboot.org/QEMU for details.
Further details on the project, a FAQ, many HOWTOs, news, development guidelines and more can be found on the coreboot website:
You can contact us directly on the coreboot mailing list:
https://www.coreboot.org/Mailinglist
The copyright on coreboot is owned by quite a large number of individual developers and companies. Please check the individual source files for details.
coreboot is licensed under the terms of the GNU General Public License (GPL). Some files are licensed under the “GPL (version 2, or any later version)”, and some files are licensed under the “GPL, version 2”. For some parts, which were derived from other projects, other (GPL-compatible) licenses may apply. Please check the individual source files for details.
This makes the resulting coreboot images licensed under the GPL, version 2.