commit | 538b1a14af72a53840509e44ebf1739fa8592e2c | [log] [tgz] |
---|---|---|
author | Nico Huber <nico.h@gmx.de> | Sun Feb 28 16:18:18 2021 +0100 |
committer | Commit Bot <commit-bot@chromium.org> | Sat Sep 11 06:18:27 2021 +0000 |
tree | e8a785d1ab4fd9f0142e7dd227940c4c07abde70 | |
parent | 50ed64b8c045fb0ecac6914843be937cf8de7746 [diff] |
sconfig: Ensure at least one `device` node below each `chip` Even though `device` entries are children of `chip` entries in the devicetree source format, the chips in the translated C structures are only hooked up to device nodes. Hence, any chip with all its settings will be silently dropped by sconfig if there is no device node below it. Let's adapt the parser to ensure that there is at least one `device` entry. The intermediate `chipchildren_dev` rule applies until the first `device` entry is found, then everything continues as before with the `chipchildren` rule. Change-Id: I54830bc1fc7d00a0605f3fe4d36a83ef57ef3312 Signed-off-by: Nico Huber <nico.h@gmx.de> Reviewed-on: https://review.coreboot.org/c/coreboot/+/51119 Reviewed-by: Arthur Heymans <arthur@aheymans.xyz> Reviewed-by: Angel Pons <th3fanbus@gmail.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org> GitOrigin-RevId: 859ecdf51771185d4b7d983e4152acf7099c1728 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/third_party/coreboot/+/3151303 Tested-by: Copybara Service <copybara-worker-blackhole@google.com> Reviewed-by: Andrew McRae <amcrae@google.com> Reviewed-by: Dossym Nurmukhanov <dossym@chromium.org> Commit-Queue: Andrew McRae <amcrae@google.com>
coreboot is a Free Software project aimed at replacing the proprietary BIOS (firmware) found in most computers. coreboot performs a little bit of hardware initialization and then executes additional boot logic, called a payload.
With the separation of hardware initialization and later boot logic, coreboot can scale from specialized applications that run directly firmware, run operating systems in flash, load custom bootloaders, or implement firmware standards, like PC BIOS services or UEFI. This allows for systems to only include the features necessary in the target application, reducing the amount of code and flash space required.
coreboot was formerly known as LinuxBIOS.
After the basic initialization of the hardware has been performed, any desired “payload” can be started by coreboot.
See https://www.coreboot.org/Payloads for a list of supported payloads.
coreboot supports a wide range of chipsets, devices, and mainboards.
For details please consult:
ANY_TOOLCHAIN
Kconfig option if you’re feeling lucky (no support in this case).Optional:
make menuconfig
and make nconfig
)Please consult https://www.coreboot.org/Build_HOWTO for details.
If you want to test coreboot without any risks before you really decide to use it on your hardware, you can use the QEMU system emulator to run coreboot virtually in QEMU.
Please see https://www.coreboot.org/QEMU for details.
Further details on the project, a FAQ, many HOWTOs, news, development guidelines and more can be found on the coreboot website:
You can contact us directly on the coreboot mailing list:
https://www.coreboot.org/Mailinglist
The copyright on coreboot is owned by quite a large number of individual developers and companies. Please check the individual source files for details.
coreboot is licensed under the terms of the GNU General Public License (GPL). Some files are licensed under the “GPL (version 2, or any later version)”, and some files are licensed under the “GPL, version 2”. For some parts, which were derived from other projects, other (GPL-compatible) licenses may apply. Please check the individual source files for details.
This makes the resulting coreboot images licensed under the GPL, version 2.