tree 7826e32d6e0067316efed6751f26749cece9dc00
parent ebf9a1abc8aedb44744fdb5410d976b302583fb2
author Michał Żygowski <michal.zygowski@3mdeb.com> 1620561249 +0200
committer Commit Bot <commit-bot@chromium.org> 1620836116 +0000

UPSTREAM: nb/amd/pi/00730F01: Use generic allocation functions for northbridge

Remove obsolete resource assigning functions. IO and MMIO address
registers are currently set by amd_initcpuio to cover whole PCI hole
under 4G to MMIO and IO 0x0000-0xFFFF is configured to be routed to
southbridge already. Use generic PCI and resource allocation functions
wherever possible to set northbridge resources.

TEST=boot Debian with Linux 4.14 on apu2 4GB ECC and apu3 2GB no ECC

Change-Id: I3aee3c250f37d39b7645a8c896b2ba2e6589a5d4
Signed-off-by: Patrick Georgi <pgeorgi@google.com>
Original-Commit-Id: fb198c6b018d715a66096859ed089d0eef0cdf2d
Original-Signed-off-by: Michał Żygowski <michal.zygowski@3mdeb.com>
Original-Change-Id: I8dd5e40bce513c5ba7f1d42a06e7ab0846666942
Original-Reviewed-on: https://review.coreboot.org/c/coreboot/+/52926
Original-Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Original-Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/third_party/coreboot/+/2892194
Reviewed-by: Patrick Georgi <pgeorgi@chromium.org>
Commit-Queue: Patrick Georgi <pgeorgi@chromium.org>
Tested-by: Patrick Georgi <pgeorgi@chromium.org>