commit | b5dbccd1c24d9ce13e224f9c966346ee51680d7a | [log] [tgz] |
---|---|---|
author | Chris Wang <chris.wang@amd.corp-partner.google.com> | Tue Sep 08 01:44:47 2020 +0800 |
committer | Commit Bot <commit-bot@chromium.org> | Fri Sep 18 01:54:07 2020 +0000 |
tree | 81cd186c0123b9270a9e6ef357afe8804f16ae94 | |
parent | 19c3a6181dc68bfc6d5e4734f3289d7ef3ac2839 [diff] |
UPSTREAM: mb/google/zork: Add dptc interface support for morphius Add dptc interface in devicetree for morphius. Set the STAPM parameters for tablet mode: dptc_enable = 1 dptc_fast_ppt_limit = 24000 dptc_slow_ppt_limit = 20000 dptc_sustained_power_limit = 6000 BUG=b:157943445 BRANCH=zork TEST=Build. check the setting changed. Signed-off-by: Furquan Shaikh <furquan@google.com> Original-Commit-Id: 7ef7596569d80bfee129761814713e1f93f7223b Original-Signed-off-by: Chris Wang <chris.wang@amd.corp-partner.google.com> Original-Change-Id: I4dac4b7e5157ad7ad407f42a6fc6b06eefbf3291 Original-Reviewed-on: https://review.coreboot.org/c/coreboot/+/45153 Original-Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Original-Reviewed-by: Furquan Shaikh <furquan@google.com> Change-Id: If6eab7b3543ce22dcfa9a9d3a1558949b5f1b892 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/third_party/coreboot/+/2415522 Reviewed-by: Furquan Shaikh <furquan@chromium.org> Tested-by: Furquan Shaikh <furquan@chromium.org> Commit-Queue: Furquan Shaikh <furquan@chromium.org>
coreboot is a Free Software project aimed at replacing the proprietary BIOS (firmware) found in most computers. coreboot performs a little bit of hardware initialization and then executes additional boot logic, called a payload.
With the separation of hardware initialization and later boot logic, coreboot can scale from specialized applications that run directly firmware, run operating systems in flash, load custom bootloaders, or implement firmware standards, like PC BIOS services or UEFI. This allows for systems to only include the features necessary in the target application, reducing the amount of code and flash space required.
coreboot was formerly known as LinuxBIOS.
After the basic initialization of the hardware has been performed, any desired “payload” can be started by coreboot.
See https://www.coreboot.org/Payloads for a list of supported payloads.
coreboot supports a wide range of chipsets, devices, and mainboards.
For details please consult:
ANY_TOOLCHAIN
Kconfig option if you’re feeling lucky (no support in this case).Optional:
make menuconfig
and make nconfig
)Please consult https://www.coreboot.org/Build_HOWTO for details.
If you want to test coreboot without any risks before you really decide to use it on your hardware, you can use the QEMU system emulator to run coreboot virtually in QEMU.
Please see https://www.coreboot.org/QEMU for details.
Further details on the project, a FAQ, many HOWTOs, news, development guidelines and more can be found on the coreboot website:
You can contact us directly on the coreboot mailing list:
https://www.coreboot.org/Mailinglist
The copyright on coreboot is owned by quite a large number of individual developers and companies. Please check the individual source files for details.
coreboot is licensed under the terms of the GNU General Public License (GPL). Some files are licensed under the “GPL (version 2, or any later version)”, and some files are licensed under the “GPL, version 2”. For some parts, which were derived from other projects, other (GPL-compatible) licenses may apply. Please check the individual source files for details.
This makes the resulting coreboot images licensed under the GPL, version 2.