commit | bcdd2a9c88772edead74828b4b2d2dfc9972395c | [log] [tgz] |
---|---|---|
author | Furquan Shaikh <furquan@google.com> | Fri Apr 24 14:04:07 2020 -0700 |
committer | Commit Bot <commit-bot@chromium.org> | Wed Apr 29 16:21:25 2020 +0000 |
tree | f7516f815c900ba8cb6f4f2b0f9184b7019734d9 | |
parent | 04d402d05aac3fedd0f654fbcb9678df097b5ebd [diff] |
UPSTREAM: soc/amd/picasso: Use a helper to set bits in PSP_SOFTFUSE This change updates Makefile.inc to use a helper function set-bit to set a bit for the soft fuses. It gets rid of the different checks that were done to set soft fuses to magic values in different places. This is still not the best way to handle the fuses and instead this logic should be embedded within the amdfwtool by making it aware of specific platforms. But until that happens, we want to avoid having to add PSP_SOFTFUSE setting in various places with different values. BUG=b:154880818 TEST=Verified that the softfuse values are same with and without this change. Change-Id: Ie360bffcef587734f9338014349f34bfbb2adcb2 Signed-off-by: Patrick Georgi <pgeorgi@google.com> Original-Commit-Id: 318e5830dbed98e6ae7574812b4d8b5b6496341c Original-Change-Id: I73887eb9c56ca5bb1c08d298fa818d698da1080b Original-Signed-off-by: Furquan Shaikh <furquan@google.com> Original-Reviewed-on: https://review.coreboot.org/c/coreboot/+/40700 Original-Reviewed-by: Marshall Dawson <marshalldawson3rd@gmail.com> Original-Reviewed-by: Angel Pons <th3fanbus@gmail.com> Original-Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/third_party/coreboot/+/2173055 Reviewed-by: Patrick Georgi <pgeorgi@chromium.org> Commit-Queue: Patrick Georgi <pgeorgi@chromium.org> Tested-by: Patrick Georgi <pgeorgi@chromium.org>
coreboot is a Free Software project aimed at replacing the proprietary BIOS (firmware) found in most computers. coreboot performs a little bit of hardware initialization and then executes additional boot logic, called a payload.
With the separation of hardware initialization and later boot logic, coreboot can scale from specialized applications that run directly firmware, run operating systems in flash, load custom bootloaders, or implement firmware standards, like PC BIOS services or UEFI. This allows for systems to only include the features necessary in the target application, reducing the amount of code and flash space required.
coreboot was formerly known as LinuxBIOS.
After the basic initialization of the hardware has been performed, any desired “payload” can be started by coreboot.
See https://www.coreboot.org/Payloads for a list of supported payloads.
coreboot supports a wide range of chipsets, devices, and mainboards.
For details please consult:
ANY_TOOLCHAIN
Kconfig option if you’re feeling lucky (no support in this case).Optional:
make menuconfig
and make nconfig
)Please consult https://www.coreboot.org/Build_HOWTO for details.
If you want to test coreboot without any risks before you really decide to use it on your hardware, you can use the QEMU system emulator to run coreboot virtually in QEMU.
Please see https://www.coreboot.org/QEMU for details.
Further details on the project, a FAQ, many HOWTOs, news, development guidelines and more can be found on the coreboot website:
You can contact us directly on the coreboot mailing list:
https://www.coreboot.org/Mailinglist
The copyright on coreboot is owned by quite a large number of individual developers and companies. Please check the individual source files for details.
coreboot is licensed under the terms of the GNU General Public License (GPL). Some files are licensed under the “GPL (version 2, or any later version)”, and some files are licensed under the “GPL, version 2”. For some parts, which were derived from other projects, other (GPL-compatible) licenses may apply. Please check the individual source files for details.
This makes the resulting coreboot images licensed under the GPL, version 2.