commit | c64d045ad521f6735281adaf31608ad6b9c6df6f | [log] [tgz] |
---|---|---|
author | David Wu <david_wu@quanta.corp-partner.google.com> | Thu Aug 08 19:20:55 2019 +0800 |
committer | Commit Bot <commit-bot@chromium.org> | Fri Aug 16 00:56:18 2019 +0000 |
tree | 33f70cfa16b400e213221d0335fd68c6423b17ee | |
parent | 67dea6ab4a87a7350898af3d7fd4318314dce073 [diff] |
UPSTREAM: mb/google/hatch/var/kindred: Configure GPIOs for eMMC SKUs Configure GPIOs for eMMC SKUs BUG=b:132918661 TEST=Verify SSD is disabled when SKU ID = 2/4/21/22 Change-Id: Ib7c7a98cb764f9cff44f4ef3bc2c995b025777d4 Signed-off-by: Patrick Georgi <pgeorgi@google.com> Original-Commit-Id: 434a975b979819d0da162097bd433fba5ac7d8c8 Original-Change-Id: I9f678a40555dbc841487811cc1f680b211a51a89 Original-Signed-off-by: David Wu <david_wu@quanta.corp-partner.google.com> Original-Reviewed-on: https://review.coreboot.org/c/coreboot/+/34795 Original-Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Original-Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org> Original-Reviewed-by: Paul Fagerburg <pfagerburg@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/third_party/coreboot/+/1757006 Reviewed-by: Patrick Georgi <pgeorgi@chromium.org> Commit-Queue: Patrick Georgi <pgeorgi@chromium.org> Tested-by: Patrick Georgi <pgeorgi@chromium.org>
coreboot is a Free Software project aimed at replacing the proprietary BIOS (firmware) found in most computers. coreboot performs a little bit of hardware initialization and then executes additional boot logic, called a payload.
With the separation of hardware initialization and later boot logic, coreboot can scale from specialized applications that run directly firmware, run operating systems in flash, load custom bootloaders, or implement firmware standards, like PC BIOS services or UEFI. This allows for systems to only include the features necessary in the target application, reducing the amount of code and flash space required.
coreboot was formerly known as LinuxBIOS.
After the basic initialization of the hardware has been performed, any desired “payload” can be started by coreboot.
See https://www.coreboot.org/Payloads for a list of supported payloads.
coreboot supports a wide range of chipsets, devices, and mainboards.
For details please consult:
ANY_TOOLCHAIN
Kconfig option if you’re feeling lucky (no support in this case).Optional:
make menuconfig
and make nconfig
)Please consult https://www.coreboot.org/Build_HOWTO for details.
If you want to test coreboot without any risks before you really decide to use it on your hardware, you can use the QEMU system emulator to run coreboot virtually in QEMU.
Please see https://www.coreboot.org/QEMU for details.
Further details on the project, a FAQ, many HOWTOs, news, development guidelines and more can be found on the coreboot website:
You can contact us directly on the coreboot mailing list:
https://www.coreboot.org/Mailinglist
The copyright on coreboot is owned by quite a large number of individual developers and companies. Please check the individual source files for details.
coreboot is licensed under the terms of the GNU General Public License (GPL). Some files are licensed under the “GPL (version 2, or any later version)”, and some files are licensed under the “GPL, version 2”. For some parts, which were derived from other projects, other (GPL-compatible) licenses may apply. Please check the individual source files for details.
This makes the resulting coreboot images licensed under the GPL, version 2.