| /* |
| * This file is part of the coreboot project. |
| * |
| * Copyright (C) 2012 Advanced Micro Devices, Inc. |
| * |
| * This program is free software; you can redistribute it and/or modify |
| * it under the terms of the GNU General Public License as published by |
| * the Free Software Foundation; version 2 of the License. |
| * |
| * This program is distributed in the hope that it will be useful, |
| * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| * GNU General Public License for more details. |
| */ |
| |
| #include <northbridge/amd/agesa/agesawrapper.h> |
| #include <PlatformMemoryConfiguration.h> |
| |
| /*---------------------------------------------------------------------------------------- |
| * CUSTOMER OVERIDES MEMORY TABLE |
| *---------------------------------------------------------------------------------------- |
| */ |
| |
| /* |
| * Platform Specific Overriding Table allows IBV/OEM to pass in platform information to AGESA |
| * (e.g. MemClk routing, the number of DIMM slots per channel,...). If PlatformSpecificTable |
| * is populated, AGESA will base its settings on the data from the table. Otherwise, it will |
| * use its default conservative settings. |
| */ |
| CONST PSO_ENTRY ROMDATA DefaultPlatformMemoryConfiguration[] = { |
| // Dinar has the following routing: |
| // CS0 M[B,A]_CLK_H/L[0] |
| // CS1 M[B,A]_CLK_H/L[2] |
| // CS2 M[B,A]_CLK_H/L[1] |
| // CS3 M[B,A]_CLK_H/L[3] |
| MEMCLK_DIS_MAP(ANY_SOCKET, ANY_CHANNEL, 0x00, 0x00, 0x01, 0x04, 0x02, 0x08, 0x00, 0x00), |
| NUMBER_OF_DIMMS_SUPPORTED(ANY_SOCKET, ANY_CHANNEL, 2), |
| PSO_END |
| }; |
| |
| |
| static AGESA_STATUS OemInitPost(AMD_POST_PARAMS *InitPost) |
| { |
| InitPost->MemConfig.UmaMode = UMA_AUTO; |
| InitPost->MemConfig.BottomIo = 0xE0; |
| InitPost->MemConfig.UmaSize = 0xE0-0xC0; |
| return AGESA_SUCCESS; |
| } |
| |
| const struct OEM_HOOK OemCustomize = { |
| .InitPost = OemInitPost, |
| }; |