tree b2b19b384f70ad809fb54f61d9fb81622d3512d3
parent c29840a67b8951a11bef4ec6ac98abf5d26761f5
author Craig Hesling <hesling@chromium.org> 1574884247 -0800
committer Commit Bot <commit-bot@chromium.org> 1575596794 +0000

UPSTREAM: hatch: Fix FPMCU pwr/rst gpio handling

1. No gpio control in bootblock
2. Disable power and assert reset in ramstage gpio
3. Power on and then deassert reset at the end of ramstage gpio
4. Disable power and assert reset when entering S5

On "reboot", the amount of time the power is disabled for is
equivalent to the amount of time between triggering #4 and wrapping
around to #3, which is about 400ms on Kohaku.

Since #2 forces power off for FPMCU, S3 resume will still
not work properly.

Additionally, we must ensure that GPP_A12 is reconfigured as an output
before going to any sleep state, since user space could have configured
it to use its native3 function.
See https://review.coreboot.org/c/coreboot/+/32111 for more detail.

The control signals have been validated on a Kohaku in
the following scenarios:
1. Cold startup
2. Issuing a "reboot" command
3. Issuing a "halt -p" and powering back on within 10 seconds
4. Issuing a "halt -p" and powering back on after 10 seconds
5. Entering and leaving S3 (does not work properly)
6. Entering and leaving S0iX

BRANCH=hatch
BUG=b/142751685
TEST=Verify all signals as mentioned above
TEST=reboot
     flash_fp_mcu /opt/google/biod/fw/dartmonkey_v2.0.2417-af88cc91a.bin
TEST=halt -p
     # power back on within 10 seconds
     flash_fp_mcu /opt/google/biod/fw/dartmonkey_v2.0.2417-af88cc91a.bin
TEST=halt -p
     # power back on after 10 seconds
     flash_fp_mcu /opt/google/biod/fw/dartmonkey_v2.0.2417-af88cc91a.bin

Change-Id: I1f032ce03ae3f59239e4ac760805ded952b7500d
Signed-off-by: Shelley Chen <shchen@google.com>
Original-Commit-Id:
Original-Change-Id: I2e3ff42715611d519677a4256bdd172ec98687f9
Original-Signed-off-by: Craig Hesling <hesling@chromium.org>
Original-Reviewed-on: https://review.coreboot.org/c/coreboot/+/37459
Original-Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Original-Reviewed-by: Furquan Shaikh <furquan@google.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/third_party/coreboot/+/1954440
Reviewed-by: Shelley Chen <shchen@chromium.org>
Reviewed-by: Craig Hesling <hesling@chromium.org>
Commit-Queue: Shelley Chen <shchen@chromium.org>
Commit-Queue: Craig Hesling <hesling@chromium.org>
Tested-by: Shelley Chen <shchen@chromium.org>
Tested-by: Craig Hesling <hesling@chromium.org>