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cos / mirrors / cros / chromiumos / third_party / coreboot / refs/heads/firmware-zork-13434.B
commit93d18352688c02172f540d5e5b9991bdc8861e8a[log] [tgz]
authorJon Murphy <jpmurphy@google.com>Mon Oct 23 20:34:37 2023 -0600
committerChromeos LUCI <chromeos-scoped@luci-project-accounts.iam.gserviceaccount.com>Thu Oct 26 22:14:04 2023 +0000
tree6af63b8ddddc3fe647df53985c8d5bc6b7b7ad32
parent33b84ba18d408e0ca24e62e8f7026dbf38798a32 [diff]
UPSTREAM: mb/google/zork: Add FP enable for Morphius

Add FP enable/disable based on SKU ID for Morphius. This is meant
to resolve a UMA issue with Morphius devices that had the FPMCU
populated on non-fp devices.  Since the FPMCU is present, and the
firmware enables the power GPIO's based on variant, not SKU, the
devices were reporting data on fingerprint errantly.

BUG=b:258040377
TEST=Flash to Morphius, test FP.
Disable test SKU, flash on Morphius, test FP.

(cherry picked from commit 10201aa99de8d78c6cea42a7222006165427d58a)

Original-Change-Id: If5794a9a1b7eb3daaa4cdfd1354dfb0c688624fd
Original-Signed-off-by: Jon Murphy <jpmurphy@google.com>
Original-Reviewed-on: https://review.coreboot.org/c/coreboot/+/78622
Original-Reviewed-by: Karthik Ramasubramanian <kramasub@google.com>
Original-Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Original-Reviewed-by: Eric Lai <ericllai@google.com>
Original-Reviewed-by: Matt DeVillier <matt.devillier@amd.corp-partner.google.com>
GitOrigin-RevId: 10201aa99de8d78c6cea42a7222006165427d58a
Change-Id: I39ba4e34dbfbd91e4c6311b4bf38f0ee1aedb34b
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/third_party/coreboot/+/4979327
Tested-by: ChromeOS Prod (Robot) <chromeos-ci-prod@chromeos-bot.iam.gserviceaccount.com>
Reviewed-by: Shelley Chen <shchen@chromium.org>
Commit-Queue: Shelley Chen <shchen@chromium.org>
(cherry picked from commit 0a003e2e6edd2a46e5ac91e1db6b537135e716a0)
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/third_party/coreboot/+/4980795
Reviewed-by: Mark Hasemeyer <markhas@google.com>
Commit-Queue: Karthikeyan Ramasubramanian <kramasub@google.com>
Tested-by: Jonathon Murphy <jpmurphy@google.com>
Reviewed-by: Karthikeyan Ramasubramanian <kramasub@google.com>
Commit-Queue: Jonathon Murphy <jpmurphy@google.com>
Auto-Submit: Jonathon Murphy <jpmurphy@google.com>
2 files changed
tree: 6af63b8ddddc3fe647df53985c8d5bc6b7b7ad32
  1. configs/
  2. Documentation/
  3. LICENSES/
  4. payloads/
  5. spd/
  6. src/
  7. tests/
  8. util/
  9. .checkpatch.conf
  10. .clang-format
  11. .editorconfig
  12. .gitignore
  13. .gitmodules
  14. .gitreview
  15. AUTHORS
  16. COPYING
  17. gnat.adc
  18. MAINTAINERS
  19. Makefile
  20. Makefile.inc
  21. PRESUBMIT.cfg
  22. README.md
  23. toolchain.inc
README.md

coreboot README

coreboot is a Free Software project aimed at replacing the proprietary BIOS (firmware) found in most computers. coreboot performs a little bit of hardware initialization and then executes additional boot logic, called a payload.

With the separation of hardware initialization and later boot logic, coreboot can scale from specialized applications that run directly firmware, run operating systems in flash, load custom bootloaders, or implement firmware standards, like PC BIOS services or UEFI. This allows for systems to only include the features necessary in the target application, reducing the amount of code and flash space required.

coreboot was formerly known as LinuxBIOS.

Payloads

After the basic initialization of the hardware has been performed, any desired “payload” can be started by coreboot.

See https://www.coreboot.org/Payloads for a list of supported payloads.

Supported Hardware

coreboot supports a wide range of chipsets, devices, and mainboards.

For details please consult:

Build Requirements

  • make
  • gcc / g++ Because Linux distribution compilers tend to use lots of patches. coreboot does lots of “unusual” things in its build system, some of which break due to those patches, sometimes by gcc aborting, sometimes - and that‘s worse - by generating broken object code. Two options: use our toolchain (eg. make crosstools-i386) or enable the ANY_TOOLCHAIN Kconfig option if you’re feeling lucky (no support in this case).
  • iasl (for targets with ACPI support)
  • pkg-config
  • libssl-dev (openssl)

Optional:

  • doxygen (for generating/viewing documentation)
  • gdb (for better debugging facilities on some targets)
  • ncurses (for make menuconfig and make nconfig)
  • flex and bison (for regenerating parsers)

Building coreboot

Please consult https://www.coreboot.org/Build_HOWTO for details.

Testing coreboot Without Modifying Your Hardware

If you want to test coreboot without any risks before you really decide to use it on your hardware, you can use the QEMU system emulator to run coreboot virtually in QEMU.

Please see https://www.coreboot.org/QEMU for details.

Website and Mailing List

Further details on the project, a FAQ, many HOWTOs, news, development guidelines and more can be found on the coreboot website:

https://www.coreboot.org

You can contact us directly on the coreboot mailing list:

https://www.coreboot.org/Mailinglist

Copyright and License

The copyright on coreboot is owned by quite a large number of individual developers and companies. Please check the individual source files for details.

coreboot is licensed under the terms of the GNU General Public License (GPL). Some files are licensed under the “GPL (version 2, or any later version)”, and some files are licensed under the “GPL, version 2”. For some parts, which were derived from other projects, other (GPL-compatible) licenses may apply. Please check the individual source files for details.

This makes the resulting coreboot images licensed under the GPL, version 2.