commit | 4a1889caa63bdea9f1f0697184c7be379a11a420 | [log] [tgz] |
---|---|---|
author | John Zhao <john.zhao@intel.com> | Tue Apr 27 14:50:39 2021 -0700 |
committer | Commit Bot <commit-bot@chromium.org> | Wed Apr 28 19:19:50 2021 +0000 |
tree | 770525d6894c4da48d4b8da6c46203646e21f930 | |
parent | f05a5aae88b5c920c006f1fb03ee7b36c21fc9ae [diff] |
UPSTREAM: mb/google/volteer: Add EC_HOST_EVENT_USB_MUX This changes adds the EC_HOST_EVENT_USB_MUX to be dark resume source. BUG=b:183140386 TEST=In S0ix, remove DP dongle, system does dark resume. AP and EC synchronized. AP got port partner disconnection. Change-Id: Iaf0173b96f547aa32645f3b1435c25d80f52cb42 Original-Signed-off-by: John Zhao <john.zhao@intel.com> Original-Commit-Id: 97a94429f2bc1e891d15d331e7ec4355892f3684 Original-Change-Id: I53bd4fee21e2e2d1f16f558ab0341a50ef9a0e14 Original-Reviewed-on: https://review.coreboot.org/c/coreboot/+/52716 Original-Reviewed-by: Tanu Malhotra <tanu.malhotra@intel.com> Original-Reviewed-by: Abe Levkoy <alevkoy@chromium.org> Original-Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org> Original-Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Signed-off-by: Tim Wawrzynczak <twawrzynczak@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/third_party/coreboot/+/2855219
coreboot is a Free Software project aimed at replacing the proprietary BIOS (firmware) found in most computers. coreboot performs a little bit of hardware initialization and then executes additional boot logic, called a payload.
With the separation of hardware initialization and later boot logic, coreboot can scale from specialized applications that run directly firmware, run operating systems in flash, load custom bootloaders, or implement firmware standards, like PC BIOS services or UEFI. This allows for systems to only include the features necessary in the target application, reducing the amount of code and flash space required.
coreboot was formerly known as LinuxBIOS.
After the basic initialization of the hardware has been performed, any desired “payload” can be started by coreboot.
See https://www.coreboot.org/Payloads for a list of supported payloads.
coreboot supports a wide range of chipsets, devices, and mainboards.
For details please consult:
ANY_TOOLCHAIN
Kconfig option if you’re feeling lucky (no support in this case).Optional:
make menuconfig
and make nconfig
)Please consult https://www.coreboot.org/Build_HOWTO for details.
If you want to test coreboot without any risks before you really decide to use it on your hardware, you can use the QEMU system emulator to run coreboot virtually in QEMU.
Please see https://www.coreboot.org/QEMU for details.
Further details on the project, a FAQ, many HOWTOs, news, development guidelines and more can be found on the coreboot website:
You can contact us directly on the coreboot mailing list:
https://www.coreboot.org/Mailinglist
The copyright on coreboot is owned by quite a large number of individual developers and companies. Please check the individual source files for details.
coreboot is licensed under the terms of the GNU General Public License (GPL). Some files are licensed under the “GPL (version 2, or any later version)”, and some files are licensed under the “GPL, version 2”. For some parts, which were derived from other projects, other (GPL-compatible) licenses may apply. Please check the individual source files for details.
This makes the resulting coreboot images licensed under the GPL, version 2.