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cos / mirrors / cros / chromiumos / third_party / coreboot / refs/heads/firmware-octopus-11297.83.B
commit79e9ef421dbc3427f135594f2b32442d333a1b6d[log] [tgz]
authorKevin Chiu <Kevin.Chiu@quantatw.com>Tue Sep 17 14:27:59 2019 +0800
committerCommit Bot <commit-bot@chromium.org>Thu Sep 19 14:59:34 2019 +0000
tree36ec3dd6634bc6a2f0f3991d3ca32400ee9b804c
parentb6f988b5b68aea909435fa3c4456706ed7e8d5d6 [diff]
UPSTREAM: mb/google/octopus/variants/garg: add LTE sku to config power sequence

Add SKU#18 to config power sequence below:
GPIOs related to power sequnce are
  GPIO_67  - EN_PP3300
  GPIO_117 - FULL_CARD_POWER_ON_OFF
  GPIO_161 - PLT_RST_LTE_L
1. Power on: GPIO_67 -> 0ms -> GPIO_117 -> 30ms -> GPIO_161
2. Power off: GPIO_161 -> 30ms -> GPIO_117 -> 100ms -> GPIO_67
3. Power reset:
  - keep GPIO_67 and GPIO_117 high and
  - pull down GPIO_161 for 30ms then release it.

BUG=b:134854577,b:137033609
BRANCH=octopus
TEST=build

Change-Id: Iee78a2fc1f5f2cc6dfe0e47a0a4927eb016b480b
Signed-off-by: Patrick Georgi <pgeorgi@google.com>
Original-Commit-Id: 0f21de842342b3108f8680834cdbcf2c43337958
Original-Change-Id: I58e07518f6daaf608684c9fa1b1c88fc592ea117
Original-Signed-off-by: Kevin Chiu <Kevin.Chiu@quantatw.com>
Original-Reviewed-on: https://review.coreboot.org/c/coreboot/+/35442
Original-Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Original-Reviewed-by: Marco Chen <marcochen@google.com>
Original-Reviewed-by: Justin TerAvest <teravest@chromium.org>
Original-Reviewed-by: Furquan Shaikh <furquan@google.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/third_party/coreboot/+/1811244
Reviewed-by: Patrick Georgi <pgeorgi@chromium.org>
Commit-Queue: Patrick Georgi <pgeorgi@chromium.org>
Tested-by: Patrick Georgi <pgeorgi@chromium.org>
(cherry picked from commit 6693e265a17fe5ec9ad44af6bbc9b146fa4d799f)
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/third_party/coreboot/+/1809185
Reviewed-by: Marco Chen <marcochen@chromium.org>
Commit-Queue: Marco Chen <marcochen@chromium.org>
Tested-by: Marco Chen <marcochen@chromium.org>
1 file changed
tree: 36ec3dd6634bc6a2f0f3991d3ca32400ee9b804c
  1. configs/
  2. Documentation/
  3. payloads/
  4. src/
  5. util/
  6. .checkpatch.conf
  7. .clang-format
  8. .gitignore
  9. .gitmodules
  10. .gitreview
  11. COMMIT-QUEUE.ini
  12. COPYING
  13. gnat.adc
  14. MAINTAINERS
  15. Makefile
  16. Makefile.inc
  17. PRESUBMIT.cfg
  18. README.md
  19. toolchain.inc
README.md

coreboot README

coreboot is a Free Software project aimed at replacing the proprietary BIOS (firmware) found in most computers. coreboot performs a little bit of hardware initialization and then executes additional boot logic, called a payload.

With the separation of hardware initialization and later boot logic, coreboot can scale from specialized applications that run directly firmware, run operating systems in flash, load custom bootloaders, or implement firmware standards, like PC BIOS services or UEFI. This allows for systems to only include the features necessary in the target application, reducing the amount of code and flash space required.

coreboot was formerly known as LinuxBIOS.

Payloads

After the basic initialization of the hardware has been performed, any desired “payload” can be started by coreboot.

See https://www.coreboot.org/Payloads for a list of supported payloads.

Supported Hardware

coreboot supports a wide range of chipsets, devices, and mainboards.

For details please consult:

Build Requirements

  • make
  • gcc / g++ Because Linux distribution compilers tend to use lots of patches. coreboot does lots of “unusual” things in its build system, some of which break due to those patches, sometimes by gcc aborting, sometimes - and that‘s worse - by generating broken object code. Two options: use our toolchain (eg. make crosstools-i386) or enable the ANY_TOOLCHAIN Kconfig option if you’re feeling lucky (no support in this case).
  • iasl (for targets with ACPI support)
  • pkg-config
  • libssl-dev (openssl)

Optional:

  • doxygen (for generating/viewing documentation)
  • gdb (for better debugging facilities on some targets)
  • ncurses (for make menuconfig and make nconfig)
  • flex and bison (for regenerating parsers)

Building coreboot

Please consult https://www.coreboot.org/Build_HOWTO for details.

Testing coreboot Without Modifying Your Hardware

If you want to test coreboot without any risks before you really decide to use it on your hardware, you can use the QEMU system emulator to run coreboot virtually in QEMU.

Please see https://www.coreboot.org/QEMU for details.

Website and Mailing List

Further details on the project, a FAQ, many HOWTOs, news, development guidelines and more can be found on the coreboot website:

https://www.coreboot.org

You can contact us directly on the coreboot mailing list:

https://www.coreboot.org/Mailinglist

Copyright and License

The copyright on coreboot is owned by quite a large number of individual developers and companies. Please check the individual source files for details.

coreboot is licensed under the terms of the GNU General Public License (GPL). Some files are licensed under the “GPL (version 2, or any later version)”, and some files are licensed under the “GPL, version 2”. For some parts, which were derived from other projects, other (GPL-compatible) licenses may apply. Please check the individual source files for details.

This makes the resulting coreboot images licensed under the GPL, version 2.