| commit | 48d253d581ab1f71cfa5607fb0914bd6012db72e | [log] [tgz] |
|---|---|---|
| author | David Wu <david_wu@quanta.corp-partner.google.com> | Thu Nov 22 20:38:47 2018 +0800 |
| committer | ChromeOS Commit Bot <chromeos-commit-bot@chromium.org> | Tue Apr 09 15:44:21 2019 +0000 |
| tree | 1cd6cd5d2401288dec734bb7bbbdb8a0d599c0ae | |
| parent | 84a009a4e71c78e204cd35cdded4da7f0d9f5359 [diff] |
UPSTREAM: mb/google/fizz/variants/karma: Clear GPP_B4 when entering S5 Set GPP_B4 to low in S5 to meet touch panel power sequence BUG=b:124197348 BRANCH=master TEST=Verify GPP_B4 is low. Change-Id: I23222b3150b2eb3900a2a5aa039dabde14ab8bfb Signed-off-by: Patrick Georgi <pgeorgi@google.com> Original-Commit-Id: 2e2fe3cc91d2831c9962e5e96bd5739eba00ea73 Original-Change-Id: I65deb33a45fdc0c0ce64deaa29c2790029dc1d12 Original-Signed-off-by: David Wu <David_Wu@quanta.corp-partner.google.com> Original-Reviewed-on: https://review.coreboot.org/c/coreboot/+/29796 Original-Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Original-Reviewed-by: Zhuohao Lee <zhuohao@chromium.org> Original-Reviewed-by: Patrick Georgi <pgeorgi@google.com> Original-Reviewed-by: David Wu <david_wu@quanta.corp-partner.google.com> Original-Reviewed-by: Furquan Shaikh <furquan@google.com> Reviewed-on: https://chromium-review.googlesource.com/1553855 Commit-Ready: Patrick Georgi <pgeorgi@chromium.org> Tested-by: Patrick Georgi <pgeorgi@chromium.org> Reviewed-by: Patrick Georgi <pgeorgi@chromium.org> (cherry picked from commit 321af3f4e847e9e09540e1d6dfa2b6c8964ed4a9) Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/third_party/coreboot/+/1559521 Tested-by: David Wu <david_wu@quanta.corp-partner.google.com> Reviewed-by: Furquan Shaikh <furquan@chromium.org> Commit-Queue: Zhuohao Lee <zhuohao@chromium.org>
coreboot is a Free Software project aimed at replacing the proprietary BIOS (firmware) found in most computers. coreboot performs a little bit of hardware initialization and then executes additional boot logic, called a payload.
With the separation of hardware initialization and later boot logic, coreboot can scale from specialized applications that run directly firmware, run operating systems in flash, load custom bootloaders, or implement firmware standards, like PC BIOS services or UEFI. This allows for systems to only include the features necessary in the target application, reducing the amount of code and flash space required.
coreboot was formerly known as LinuxBIOS.
After the basic initialization of the hardware has been performed, any desired “payload” can be started by coreboot.
See https://www.coreboot.org/Payloads for a list of supported payloads.
coreboot supports a wide range of chipsets, devices, and mainboards.
For details please consult:
ANY_TOOLCHAIN Kconfig option if you’re feeling lucky (no support in this case).Optional:
make menuconfig and make nconfig)Please consult https://www.coreboot.org/Build_HOWTO for details.
If you want to test coreboot without any risks before you really decide to use it on your hardware, you can use the QEMU system emulator to run coreboot virtually in QEMU.
Please see https://www.coreboot.org/QEMU for details.
Further details on the project, a FAQ, many HOWTOs, news, development guidelines and more can be found on the coreboot website:
You can contact us directly on the coreboot mailing list:
https://www.coreboot.org/Mailinglist
The copyright on coreboot is owned by quite a large number of individual developers and companies. Please check the individual source files for details.
coreboot is licensed under the terms of the GNU General Public License (GPL). Some files are licensed under the “GPL (version 2, or any later version)”, and some files are licensed under the “GPL, version 2”. For some parts, which were derived from other projects, other (GPL-compatible) licenses may apply. Please check the individual source files for details.
This makes the resulting coreboot images licensed under the GPL, version 2.