commit | ac8742969fef1ce3bb4cfa0e5bae206661ad7648 | [log] [tgz] |
---|---|---|
author | Yu-Ping Wu <yupingso@chromium.org> | Thu Feb 10 17:27:57 2022 +0800 |
committer | Hung-Te Lin <hungte@chromium.org> | Wed Feb 16 09:30:04 2022 +0000 |
tree | d6dfacd6f7a63c13b592f92e40b25510e719cb62 | |
parent | b2c84cc22f10fea6063ffca4fc23892673450145 [diff] |
UPSTREAM: soc/mediatek: Fix printing SPM version Currently the SPM version string is stored at the end of the blob, possibly without a trailing '\0'. Therefore, we should be careful not to print characters beyond the blob size. BUG=b:211944565 TEST=emerge-corsola coreboot TEST=SPM version looked good in AP console BRANCH=asurada,cherry (cherry picked from commit 2fdcb64ec96dc80ae83d289ba9d18e20f86f2930) Signed-off-by: Yu-Ping Wu <yupingso@chromium.org> Reviewed-on: https://review.coreboot.org/c/coreboot/+/61800 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Hung-Te Lin <hungte@chromium.org> Original-Change-Id: Icfeb686539dc20cf5b78de77c27bdbb137b5d624 GitOrigin-RevId: 2fdcb64ec96dc80ae83d289ba9d18e20f86f2930 Change-Id: I9aac986715595ea22a312de6a4a6517c2368576d Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/third_party/coreboot/+/3458959 Tested-by: CopyBot Service Account <copybot.service@gmail.com> Reviewed-by: Ricardo Quesada <ricardoq@chromium.org> Commit-Queue: Ricardo Quesada <ricardoq@chromium.org> (cherry picked from commit 8a5494f08cfdc06e29ac579589e47437069f1c8b) Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/third_party/coreboot/+/3466587 Commit-Queue: Hung-Te Lin <hungte@chromium.org>
coreboot is a Free Software project aimed at replacing the proprietary BIOS (firmware) found in most computers. coreboot performs a little bit of hardware initialization and then executes additional boot logic, called a payload.
With the separation of hardware initialization and later boot logic, coreboot can scale from specialized applications that run directly firmware, run operating systems in flash, load custom bootloaders, or implement firmware standards, like PC BIOS services or UEFI. This allows for systems to only include the features necessary in the target application, reducing the amount of code and flash space required.
coreboot was formerly known as LinuxBIOS.
After the basic initialization of the hardware has been performed, any desired “payload” can be started by coreboot.
See https://www.coreboot.org/Payloads for a list of supported payloads.
coreboot supports a wide range of chipsets, devices, and mainboards.
For details please consult:
ANY_TOOLCHAIN
Kconfig option if you’re feeling lucky (no support in this case).Optional:
make menuconfig
and make nconfig
)Please consult https://www.coreboot.org/Build_HOWTO for details.
If you want to test coreboot without any risks before you really decide to use it on your hardware, you can use the QEMU system emulator to run coreboot virtually in QEMU.
Please see https://www.coreboot.org/QEMU for details.
Further details on the project, a FAQ, many HOWTOs, news, development guidelines and more can be found on the coreboot website:
You can contact us directly on the coreboot mailing list:
https://www.coreboot.org/Mailinglist
The copyright on coreboot is owned by quite a large number of individual developers and companies. Please check the individual source files for details.
coreboot is licensed under the terms of the GNU General Public License (GPL). Some files are licensed under the “GPL (version 2, or any later version)”, and some files are licensed under the “GPL, version 2”. For some parts, which were derived from other projects, other (GPL-compatible) licenses may apply. Please check the individual source files for details.
This makes the resulting coreboot images licensed under the GPL, version 2.