| commit | af441c19a59f5854877cb89d640b6db98c0504e8 | [log] [tgz] |
|---|---|---|
| author | Tony Huang <tony-huang@quanta.corp-partner.google.com> | Mon Jan 18 14:11:20 2021 +0800 |
| committer | Commit Bot <commit-bot@chromium.org> | Mon Jan 25 02:51:36 2021 +0000 |
| tree | 4d29fc777edddd7e2f7a73052e04915d68fc0499 | |
| parent | 58decd1782a2eee8e07d36cda5130fa69092a514 [diff] |
UPSTREAM: mb/google/octopus: Garfour override VBT selection
Disable DRRS in VBT to solve panel flick issue
SKU ID
49/51 will use vbt_garfour.bin
50/52 will use vbt_garfour_hdmi.bin
BUG=b:177783330
BRANCH=octopus
TEST=emerge-octopus coreboot chromeos-bootimage
check /run/debug/i915_drrs_status shows DRRS supported NO.
Change-Id: Ib9f489982fad3755a529cc6fc71b0ea4e8783fcd
Signed-off-by: Patrick Georgi <pgeorgi@google.com>
Original-Commit-Id: 8ab253c9a91da036a7d079028623b723a78c1eae
Cq-Depend: chrome-internal:3534569
Original-Change-Id: I5ebb66ec043a6b409dd5abbc31da417f50dbad5c
Original-Signed-off-by: Tony Huang <tony-huang@quanta.corp-partner.google.com>
Original-Reviewed-on: https://review.coreboot.org/c/coreboot/+/49635
Original-Reviewed-by: Karthik Ramasubramanian <kramasub@google.com>
Original-Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/third_party/coreboot/+/2644998
Reviewed-by: Patrick Georgi <pgeorgi@chromium.org>
Tested-by: Patrick Georgi <pgeorgi@chromium.org>
Commit-Queue: Patrick Georgi <pgeorgi@chromium.org>
(cherry picked from commit 1b299e5729c4d2d8b2959706f80385e0e7665b24)
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/third_party/coreboot/+/2646485
Reviewed-by: Henry Sun <henrysun@google.com>
Commit-Queue: Henry Sun <henrysun@google.com>
Tested-by: Henry Sun <henrysun@google.com>
coreboot is a Free Software project aimed at replacing the proprietary BIOS (firmware) found in most computers. coreboot performs a little bit of hardware initialization and then executes additional boot logic, called a payload.
With the separation of hardware initialization and later boot logic, coreboot can scale from specialized applications that run directly firmware, run operating systems in flash, load custom bootloaders, or implement firmware standards, like PC BIOS services or UEFI. This allows for systems to only include the features necessary in the target application, reducing the amount of code and flash space required.
coreboot was formerly known as LinuxBIOS.
After the basic initialization of the hardware has been performed, any desired “payload” can be started by coreboot.
See https://www.coreboot.org/Payloads for a list of supported payloads.
coreboot supports a wide range of chipsets, devices, and mainboards.
For details please consult:
ANY_TOOLCHAIN Kconfig option if you’re feeling lucky (no support in this case).Optional:
make menuconfig and make nconfig)Please consult https://www.coreboot.org/Build_HOWTO for details.
If you want to test coreboot without any risks before you really decide to use it on your hardware, you can use the QEMU system emulator to run coreboot virtually in QEMU.
Please see https://www.coreboot.org/QEMU for details.
Further details on the project, a FAQ, many HOWTOs, news, development guidelines and more can be found on the coreboot website:
You can contact us directly on the coreboot mailing list:
https://www.coreboot.org/Mailinglist
The copyright on coreboot is owned by quite a large number of individual developers and companies. Please check the individual source files for details.
coreboot is licensed under the terms of the GNU General Public License (GPL). Some files are licensed under the “GPL (version 2, or any later version)”, and some files are licensed under the “GPL, version 2”. For some parts, which were derived from other projects, other (GPL-compatible) licenses may apply. Please check the individual source files for details.
This makes the resulting coreboot images licensed under the GPL, version 2.