| commit | cad659cda763f38d515b6908454723c199baa466 | [log] [tgz] |
|---|---|---|
| author | Michael Niewöhner <foss@mniewoehner.de> | Mon Dec 28 15:00:39 2020 +0100 |
| committer | Commit Bot <commit-bot@chromium.org> | Fri Jan 01 22:31:48 2021 +0000 |
| tree | a355d2e490359f427ca9646572e213813d75b40a | |
| parent | 8737666acda8e539a34ccaef9c61ab08156e6a2e [diff] |
UPSTREAM: soc/intel/bdw,nb/intel/hsw: convert panel delays to ms representation
For easier review of the switch to a new register struct in the
follow-up change, the panel delay times get converted from destination
register raw format to milliseconds representation in this change.
Formula for conversion of power cycle delay:
gpu_panel_power_cycle_delay_ms =
(gpu_panel_power_cycle_delay - 1) * 100
Formula for all others:
gpu_panel_power_X_delay_ms = gpu_panel_power_X_delay / 10
The register names gain a suffix `_ms` and calculation of the
destination register raw values gets done in gma code now.
BUG=none
BRANCH=none
TEST=none
Signed-off-by: Dossym Nurmukhanov <dossym@google.com>
Original-Commit-Id: 44fa0d4ca00fa4ca88415b7ca717767dd31f83f7
Original-Change-Id: Idf8e076dac2b3048a63a0109263a6e7899f07230
Original-Signed-off-by: Michael Niewöhner <foss@mniewoehner.de>
Original-Reviewed-on: https://review.coreboot.org/c/coreboot/+/48958
Original-Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Original-Reviewed-by: Nico Huber <nico.h@gmx.de>
Original-Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Change-Id: I92d167d52e215b7d08d8a15297e919a5f0ef32e9
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/third_party/coreboot/+/2608460
Reviewed-by: Dossym Nurmukhanov <dossym@chromium.org>
Commit-Queue: Dossym Nurmukhanov <dossym@chromium.org>
Tested-by: Dossym Nurmukhanov <dossym@chromium.org>
coreboot is a Free Software project aimed at replacing the proprietary BIOS (firmware) found in most computers. coreboot performs a little bit of hardware initialization and then executes additional boot logic, called a payload.
With the separation of hardware initialization and later boot logic, coreboot can scale from specialized applications that run directly firmware, run operating systems in flash, load custom bootloaders, or implement firmware standards, like PC BIOS services or UEFI. This allows for systems to only include the features necessary in the target application, reducing the amount of code and flash space required.
coreboot was formerly known as LinuxBIOS.
After the basic initialization of the hardware has been performed, any desired “payload” can be started by coreboot.
See https://www.coreboot.org/Payloads for a list of supported payloads.
coreboot supports a wide range of chipsets, devices, and mainboards.
For details please consult:
ANY_TOOLCHAIN Kconfig option if you’re feeling lucky (no support in this case).Optional:
make menuconfig and make nconfig)Please consult https://www.coreboot.org/Build_HOWTO for details.
If you want to test coreboot without any risks before you really decide to use it on your hardware, you can use the QEMU system emulator to run coreboot virtually in QEMU.
Please see https://www.coreboot.org/QEMU for details.
Further details on the project, a FAQ, many HOWTOs, news, development guidelines and more can be found on the coreboot website:
You can contact us directly on the coreboot mailing list:
https://www.coreboot.org/Mailinglist
The copyright on coreboot is owned by quite a large number of individual developers and companies. Please check the individual source files for details.
coreboot is licensed under the terms of the GNU General Public License (GPL). Some files are licensed under the “GPL (version 2, or any later version)”, and some files are licensed under the “GPL, version 2”. For some parts, which were derived from other projects, other (GPL-compatible) licenses may apply. Please check the individual source files for details.
This makes the resulting coreboot images licensed under the GPL, version 2.