tree 9ee9b4a9c6ac6f7f8fd90c325a8f4ef14ae25986
parent f6a8ff6e889335f13a307252379c0deb7900ab2d
author Jamie Ryu <jamie.m.ryu@intel.com> 1591865833 -0700
committer Commit Bot <commit-bot@chromium.org> 1593899629 +0000

UPSTREAM: soc/intel/tigerlake: Disable hybrid storage mode in CSE Lite RO boot

A UPD HybridStorageMode allows a platform to dynamically configure the
PCIe strap configuration required if an Optane device is connected.
The strap configuration is done by HECI commands between FSP and CSE to
override the default PCIe strap value, and the updated strap value is
stored in SPI RW data to be used on the next boot.

CSE Lite supports the strap override when running on CSE RW partition,
while CSE RO partition does not support it because CSE RO is not allowed
to access SPI RW data. The strap override failure on CSE RO causes FSP
not initializing PCH Clkreq and PCIe port mapping and this results NVMe
and Optane initialization failure.

By disabling HybridStorageMode in case of CSE RO boot, NVMe detection is
done by the default PCIe configuration and Optane is detected as a
single NVMe storage device on CSE RO boot in recovery mode. Both NVMe
and Optane devices detection as well as OS installation to these storage
devices are verified on CSE RO boot in recovery mode.

BUG=b:158643194
TEST=boot and verified with tglrvp and volteer in recovery mode

Cq-Depend: chrome-internal:3100721
Change-Id: I6e88111a956d39c370e3d682a9e11c6a43fdc4b4
Signed-off-by: Nick Vaccaro <nvaccaro@google.com>
Original-Commit-Id: 02a1b338f833e095191b78aef8763ba361fee489
Original-Signed-off-by: Jamie Ryu <jamie.m.ryu@intel.com>
Original-Change-Id: I5397cfc007069debe3701bf1e38e81bd17a29f0c
Original-Reviewed-on: https://review.coreboot.org/c/coreboot/+/42282
Original-Reviewed-by: Nick Vaccaro <nvaccaro@google.com>
Original-Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/third_party/coreboot/+/2281287