commit | e1658b63208a6be23e983f5b1a6e864635a2ab5c | [log] [tgz] |
---|---|---|
author | Lijian Zhao <lijian.zhao@intel.com> | Thu Dec 20 21:34:40 2018 -0800 |
committer | chrome-bot <chrome-bot@chromium.org> | Fri Dec 28 16:13:59 2018 -0800 |
tree | a79d92d51d7ccce3f34e8884956fda9e085ada33 | |
parent | 619986366cbd9b0b9edb8e1c85aa12173d4f34f4 [diff] |
UPSTREAM: mb/google/sarien: Disable pcie interface for wwan WWAN chip support 3 interfaces as pci express, USB 2.0 and USB 3.0, the usgae of Sarien choose to only use USB interface but not over pci express, so totally disable pci express root port 12. BUG=b:1246720 TEST=Boot up into OS with WWAN attached, cold boot and warm boot 10 cyles can still device can be listed under lsusb. Change-Id: I26b7bde105cb0ce32b16c95fa585acbe9dc42135 Signed-off-by: Patrick Georgi <pgeorgi@google.com> Original-Commit-Id: bb3d01a24959c507fa8efb28d654b1e69cc660cc Original-Signed-off-by: Lijian Zhao <lijian.zhao@intel.com> Original-Change-Id: Ic4da393c0c0d903848111e1c037c2730c86afa7d Original-Reviewed-on: https://review.coreboot.org/c/30350 Original-Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Original-Reviewed-by: Duncan Laurie <dlaurie@chromium.org> Original-Reviewed-by: EricR Lai <ericr_lai@compal.corp-partner.google.com> Reviewed-on: https://chromium-review.googlesource.com/1390615 Commit-Ready: ChromeOS CL Exonerator Bot <chromiumos-cl-exonerator@appspot.gserviceaccount.com> Tested-by: Patrick Georgi <pgeorgi@chromium.org> Reviewed-by: Patrick Georgi <pgeorgi@chromium.org>
coreboot is a Free Software project aimed at replacing the proprietary BIOS (firmware) found in most computers. coreboot performs a little bit of hardware initialization and then executes additional boot logic, called a payload.
With the separation of hardware initialization and later boot logic, coreboot can scale from specialized applications that run directly firmware, run operating systems in flash, load custom bootloaders, or implement firmware standards, like PC BIOS services or UEFI. This allows for systems to only include the features necessary in the target application, reducing the amount of code and flash space required.
coreboot was formerly known as LinuxBIOS.
After the basic initialization of the hardware has been performed, any desired “payload” can be started by coreboot.
See https://www.coreboot.org/Payloads for a list of supported payloads.
coreboot supports a wide range of chipsets, devices, and mainboards.
For details please consult:
ANY_TOOLCHAIN
Kconfig option if you’re feeling lucky (no support in this case).Optional:
make menuconfig
and make nconfig
)Please consult https://www.coreboot.org/Build_HOWTO for details.
If you want to test coreboot without any risks before you really decide to use it on your hardware, you can use the QEMU system emulator to run coreboot virtually in QEMU.
Please see https://www.coreboot.org/QEMU for details.
Further details on the project, a FAQ, many HOWTOs, news, development guidelines and more can be found on the coreboot website:
You can contact us directly on the coreboot mailing list:
https://www.coreboot.org/Mailinglist
The copyright on coreboot is owned by quite a large number of individual developers and companies. Please check the individual source files for details.
coreboot is licensed under the terms of the GNU General Public License (GPL). Some files are licensed under the “GPL (version 2, or any later version)”, and some files are licensed under the “GPL, version 2”. For some parts, which were derived from other projects, other (GPL-compatible) licenses may apply. Please check the individual source files for details.
This makes the resulting coreboot images licensed under the GPL, version 2.