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cos / mirrors / cros / chromiumos / third_party / coreboot / refs/heads/factory-nissa-15199.B
commitc374196d01d4bb02418b43fd549a3c2b14b2b7c8[log] [tgz]
authorReka Norman <rekanorman@google.com>Fri Jan 05 12:54:44 2024 +1100
committerChromeos LUCI <chromeos-scoped@luci-project-accounts.iam.gserviceaccount.com>Wed Jan 24 09:06:34 2024 +0000
tree803d8ed0c74d6fe41c39545ecf0d454d96dfb8e2
parent00828f5b75ff1b0d303f4ecf4ed2dfff6367d82e [diff]
UPSTREAM: util/ifdtool: Add support for extended region read/write access

Platforms from CNL onwards support up to 16 flash regions, not 12. The
permissions for regions [15:12] are stored in extended region
read/write access fields in the FLMSTR registers. Currently ifdtool
treats these fields as reserved, so they're not modified when locking or
unlocking.

Add support for extended regions so that they are locked/unlocked by the
--lock/--unlock options. This will make the locked/unlocked descriptors
generated by ifdtool match those generated by mFIT.

BUG=b:270275115
TEST=Without this change:

`ifdtool -lr -p adl` on unlocked image:
Before:
00000080  ff ff ff ff ff ff ff ff  ff ff ff ff 00 00 00 00
00000090  ff ff ff ff
After:
00000080  ff 07 20 00 ff 05 40 00  ff 00 00 00 00 00 00 00
00000090  ff 00 00 00

`ifdtool -u -p adl` on locked image:
Before:
00000080  00 07 20 00 00 05 40 00  00 00 00 00 00 00 00 00
00000090  00 00 00 00
After:
00000080  00 ff ff ff 00 ff ff ff  00 ff ff ff 00 00 00 00
00000090  00 ff ff ff

With this change:

`ifdtool -lr -p adl` on unlocked image:
Before:
00000080  ff ff ff ff ff ff ff ff  ff ff ff ff 00 00 00 00
00000090  ff ff ff ff
After:
00000080  00 07 20 00 00 05 40 00  00 00 00 00 00 00 00 00
00000090  00 00 00 00

`ifdtool -u -p adl` on locked image:
Before:
00000080  00 07 20 00 00 05 40 00  00 00 00 00 00 00 00 00
00000090  00 00 00 00
After:
00000080  ff ff ff ff ff ff ff ff  ff ff ff ff 00 00 00 00
00000090  ff ff ff ff

(cherry picked from commit afed45dbaabafc684883bd2ceade1d76f3eb6089)

Original-Change-Id: Iaa43524d91c399a996ade56f2f613b4110a44aad
Original-Reviewed-on: https://review.coreboot.org/c/coreboot/+/79790
Original-Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
GitOrigin-RevId: afed45dbaabafc684883bd2ceade1d76f3eb6089
Change-Id: I45c61d1bf3a915acb9bfa13607cd572ad20b515f
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/third_party/coreboot/+/5177588
Tested-by: ChromeOS Prod (Robot) <chromeos-ci-prod@chromeos-bot.iam.gserviceaccount.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/third_party/coreboot/+/5199731
Tested-by: Phoebe Wang <phoebewang@chromium.org>
Reviewed-by: Cheng Yueh <cyueh@chromium.org>
Commit-Queue: Phoebe Wang <phoebewang@chromium.org>
Auto-Submit: Phoebe Wang <phoebewang@chromium.org>
1 file changed
tree: 803d8ed0c74d6fe41c39545ecf0d454d96dfb8e2
  1. configs/
  2. Documentation/
  3. LICENSES/
  4. payloads/
  5. spd/
  6. src/
  7. tests/
  8. util/
  9. .checkpatch.conf
  10. .clang-format
  11. .editorconfig
  12. .gitignore
  13. .gitmodules
  14. .gitreview
  15. .mailmap
  16. AUTHORS
  17. COPYING
  18. gnat.adc
  19. MAINTAINERS
  20. Makefile
  21. Makefile.inc
  22. OWNERS
  23. PRESUBMIT.cfg
  24. README.md
  25. toolchain.inc
  26. unblocked_terms.txt
README.md

coreboot README

coreboot is a Free Software project aimed at replacing the proprietary BIOS (firmware) found in most computers. coreboot performs a little bit of hardware initialization and then executes additional boot logic, called a payload.

With the separation of hardware initialization and later boot logic, coreboot can scale from specialized applications that run directly firmware, run operating systems in flash, load custom bootloaders, or implement firmware standards, like PC BIOS services or UEFI. This allows for systems to only include the features necessary in the target application, reducing the amount of code and flash space required.

coreboot was formerly known as LinuxBIOS.

Payloads

After the basic initialization of the hardware has been performed, any desired “payload” can be started by coreboot.

See https://www.coreboot.org/Payloads for a list of supported payloads.

Supported Hardware

coreboot supports a wide range of chipsets, devices, and mainboards.

For details please consult:

Build Requirements

  • make
  • gcc / g++ Because Linux distribution compilers tend to use lots of patches. coreboot does lots of “unusual” things in its build system, some of which break due to those patches, sometimes by gcc aborting, sometimes - and that‘s worse - by generating broken object code. Two options: use our toolchain (eg. make crosstools-i386) or enable the ANY_TOOLCHAIN Kconfig option if you’re feeling lucky (no support in this case).
  • iasl (for targets with ACPI support)
  • pkg-config
  • libssl-dev (openssl)

Optional:

  • gdb (for better debugging facilities on some targets)
  • ncurses (for make menuconfig and make nconfig)
  • flex and bison (for regenerating parsers)

Building coreboot

Please consult https://www.coreboot.org/Build_HOWTO for details.

Testing coreboot Without Modifying Your Hardware

If you want to test coreboot without any risks before you really decide to use it on your hardware, you can use the QEMU system emulator to run coreboot virtually in QEMU.

Please see https://www.coreboot.org/QEMU for details.

Website and Mailing List

Further details on the project, a FAQ, many HOWTOs, news, development guidelines and more can be found on the coreboot website:

https://www.coreboot.org

You can contact us directly on the coreboot mailing list:

https://www.coreboot.org/Mailinglist

Copyright and License

The copyright on coreboot is owned by quite a large number of individual developers and companies. Please check the individual source files for details.

coreboot is licensed under the terms of the GNU General Public License (GPL). Some files are licensed under the “GPL (version 2, or any later version)”, and some files are licensed under the “GPL, version 2”. For some parts, which were derived from other projects, other (GPL-compatible) licenses may apply. Please check the individual source files for details.

This makes the resulting coreboot images licensed under the GPL, version 2.