tree c91f33a3ee81894568cc8407c03c36af6eac33c6
parent 7efdf3feffbdcb67e9fdc63d2a02153cfa0a39e9
author David Hendricks <dhendrix@chromium.org> 1371262616 -0700
committer ChromeBot <chrome-bot@google.com> 1371612694 -0700

exynos5420: update I2C code, add HSI2C/USI support

This updates the low-level I2C code to handle the new high-speed
HSI2C/USI inteface. It also outputs a bit more error information
when things go wrong. Also adds some more error prints. Timeouts
really need to be noted.

In hsi2c_wait_for_irq, order the delay so that we do an initial
sleep first to avoid an early-test that was kicking us out of the
test too soon. We got to the test before the hardware was ready
for us. Finally, test clearing the interrupt status register every time
we wait for it on the write. Works.

BUG=chrome-os-partner:19420
BRANCH=none
TEST=TODO...

Change-Id: I785a4b9038d25c1a564784da0b7d54eaa9ef651d
Signed-off-by: Ronald G. Minnich <rminnich@google.com>
Reviewed-on: https://gerrit.chromium.org/gerrit/58761
Commit-Queue: David Hendricks <dhendrix@chromium.org>
Reviewed-by: David Hendricks <dhendrix@chromium.org>
Tested-by: David Hendricks <dhendrix@chromium.org>