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/* $NoKeywords:$ */
/**
* @file
*
* The initializer for Family 15h Mode 10h-1Fh northbridge support.
*
* @xrefitem bom "File Content Label" "Release Content"
* @e project: AGESA
* @e sub-project: HyperTransport
* @e \$Revision: 63425 $ @e \$Date: 2011-12-22 11:24:10 -0600 (Thu, 22 Dec 2011) $
*
*/
/*
*****************************************************************************
*
* Copyright 2008 - 2012 ADVANCED MICRO DEVICES, INC. All Rights Reserved.
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*/
/*
*----------------------------------------------------------------------------
* MODULES USED
*
*----------------------------------------------------------------------------
*/
#include "AGESA.h"
#include "amdlib.h"
#include "OptionsHt.h"
#include "Ids.h"
#include "Topology.h"
#include "htFeat.h"
#include "htNb.h"
#include "CommonReturns.h"
#include "htNbUtilitiesFam15Mod1x.h"
#include "cpuFamRegisters.h"
#include "Filecode.h"
#define FILECODE PROC_HT_FAM15MOD1X_HTNBFAM15MOD1X_FILECODE
extern OPTION_HT_CONFIGURATION OptionHtConfiguration;
/*----------------------------------------------------------------------------
* DEFINITIONS AND MACROS
*
*----------------------------------------------------------------------------
*/
/*----------------------------------------------------------------------------
* TYPEDEFS AND STRUCTURES
*
*----------------------------------------------------------------------------
*/
/*----------------------------------------------------------------------------
* PROTOTYPES OF LOCAL FUNCTIONS
*
*----------------------------------------------------------------------------
*/
/***************************************************************************
*** FAMILY/NORTHBRIDGE SPECIFIC FUNCTIONS ***
***************************************************************************/
/**
* Initial construction data for no HT Northbridge.
*/
CONST NORTHBRIDGE ROMDATA HtFam15Mod1xNb =
{
1,
(PF_WRITE_ROUTING_TABLE)CommonVoid,
(PF_WRITE_NODEID)CommonVoid,
(PF_READ_DEFAULT_LINK)CommonReturnZero8,
(PF_ENABLE_ROUTING_TABLES)CommonVoid,
(PF_DISABLE_ROUTING_TABLES)CommonVoid,
(PF_VERIFY_LINK_IS_COHERENT)CommonReturnFalse,
(PF_READ_TOKEN)CommonReturnZero8,
(PF_WRITE_TOKEN)CommonVoid,
(PF_WRITE_FULL_ROUTING_TABLE)CommonVoid,
(PF_IS_ILLEGAL_TYPE_MIX)CommonReturnFalse,
(PF_IS_EXCEEDED_CAPABLE)CommonReturnFalse,
(PF_STOP_LINK)CommonVoid,
(PF_HANDLE_SPECIAL_LINK_CASE)CommonReturnFalse,
(PF_HANDLE_SPECIAL_NODE_CASE)CommonReturnFalse,
(PF_READ_SB_LINK)CommonReturnZero8,
(PF_VERIFY_LINK_IS_NON_COHERENT)CommonReturnFalse,
(PF_SET_CONFIG_ADDR_MAP)CommonVoid,
(PF_NORTH_BRIDGE_FREQ_MASK)CommonReturnZero32,
(PF_GATHER_LINK_FEATURES)CommonVoid,
(PF_SET_LINK_REGANG)CommonVoid,
(PF_SET_LINK_FREQUENCY)CommonVoid,
(PF_SET_LINK_UNITID_CLUMPING)CommonVoid,
(PF_WRITE_TRAFFIC_DISTRIBUTION)CommonVoid,
(PF_WRITE_LINK_PAIR_DISTRIBUTION)CommonVoid,
(PF_WRITE_VICTIM_DISTRIBUTION)CommonVoid,
(PF_BUFFER_OPTIMIZATIONS)CommonVoid,
Fam15Mod1xGetNumCoresOnNode,
Fam15Mod1xSetTotalCores,
Fam15Mod1xGetNodeCount,
(PF_LIMIT_NODES)CommonVoid,
(PF_READ_TRUE_LINK_FAIL_STATUS)CommonReturnFalse,
(PF_GET_NEXT_LINK)CommonReturnZero32,
(PF_GET_PACKAGE_LINK)CommonReturnZero8,
(PF_MAKE_LINK_BASE)CommonReturnZero32,
(PF_GET_MODULE_INFO)CommonVoid,
(PF_POST_MAILBOX)CommonVoid,
(PF_RETRIEVE_MAILBOX)CommonReturnZero32,
(PF_GET_SOCKET)CommonReturnZero8,
(PF_GET_ENABLED_COMPUTE_UNITS)Fam15Mod1xGetEnabledComputeUnits,
(PF_GET_DUALCORE_COMPUTE_UNITS)Fam15Mod1xGetDualcoreComputeUnits,
0,
0,
0,
TRUE,
TRUE,
AMD_FAMILY_TN ,
NULL,
0,
NULL,
(PF_MAKE_KEY)CommonReturnZero64,
NULL
};