| /* $NoKeywords:$ */ |
| /** |
| * @file |
| * |
| * NB services |
| * |
| * |
| * |
| * @xrefitem bom "File Content Label" "Release Content" |
| * @e project: AGESA |
| * @e sub-project: GNB |
| * @e \$Revision: 63425 $ @e \$Date: 2011-12-22 11:24:10 -0600 (Thu, 22 Dec 2011) $ |
| * |
| */ |
| /* |
| ***************************************************************************** |
| * |
| * Copyright 2008 - 2012 ADVANCED MICRO DEVICES, INC. All Rights Reserved. |
| * |
| * AMD is granting you permission to use this software (the Materials) |
| * pursuant to the terms and conditions of your Software License Agreement |
| * with AMD. This header does *NOT* give you permission to use the Materials |
| * or any rights under AMD's intellectual property. Your use of any portion |
| * of these Materials shall constitute your acceptance of those terms and |
| * conditions. If you do not agree to the terms and conditions of the Software |
| * License Agreement, please do not use any portion of these Materials. |
| * |
| * CONFIDENTIALITY: The Materials and all other information, identified as |
| * confidential and provided to you by AMD shall be kept confidential in |
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| * |
| * LIMITATION OF LIABILITY: THE MATERIALS AND ANY OTHER RELATED INFORMATION |
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| * government nor will be used for any purpose prohibited by the same. |
| * *************************************************************************** |
| * |
| */ |
| |
| /*---------------------------------------------------------------------------------------- |
| * M O D U L E S U S E D |
| *---------------------------------------------------------------------------------------- |
| */ |
| #include "AGESA.h" |
| #include "Ids.h" |
| #include "S3SaveState.h" |
| #include "Gnb.h" |
| #include "GnbPcieConfig.h" |
| #include "GnbCommonLib.h" |
| #include "GnbFamServices.h" |
| #include "GnbRegistersTN.h" |
| #include "heapManager.h" |
| #include "Filecode.h" |
| #define FILECODE PROC_GNB_MODULES_GNBIOMMUSCRATCH_GNBIOMMUSCRATCH_FILECODE |
| /*---------------------------------------------------------------------------------------- |
| * D E F I N I T I O N S A N D M A C R O S |
| *---------------------------------------------------------------------------------------- |
| */ |
| |
| |
| /*---------------------------------------------------------------------------------------- |
| * T Y P E D E F S A N D S T R U C T U R E S |
| *---------------------------------------------------------------------------------------- |
| */ |
| |
| |
| /*---------------------------------------------------------------------------------------- |
| * P R O T O T Y P E S O F L O C A L F U N C T I O N S |
| *---------------------------------------------------------------------------------------- |
| */ |
| |
| |
| /*----------------------------------------------------------------------------------------*/ |
| /** |
| * Set Iommu Scratch Memory Range |
| * 1) code needs to be executed at Late Init |
| * 2) Allocate heap using heap type HEAP_RUNTIME_SYSTEM_MEM |
| * 3) Allocate enough memory to be able to get address aligned required by register |
| * 4) Assign same address to all Gnb in system |
| * |
| * |
| * @param[in] StdHeader Standard configuration header |
| */ |
| |
| AGESA_STATUS |
| GnbIommuScratchMemoryRangeInterface ( |
| IN AMD_CONFIG_PARAMS *StdHeader |
| ) |
| { |
| AGESA_STATUS Status; |
| ALLOCATE_HEAP_PARAMS AllocHeapParams; |
| UINT32 AddressLow; |
| UINT32 AddressHigh; |
| GNB_HANDLE *GnbHandle; |
| |
| IDS_HDT_CONSOLE (GNB_TRACE, "GnbIommuScratchMemoryRangeInterface Enter\n"); |
| |
| AllocHeapParams.RequestedBufferSize = 128; |
| AllocHeapParams.BufferHandle = AMD_GNB_IOMMU_SCRATCH_MEM_HANDLE; |
| AllocHeapParams.Persist = HEAP_RUNTIME_SYSTEM_MEM; |
| Status = HeapAllocateBuffer (&AllocHeapParams, StdHeader); |
| if (Status != AGESA_SUCCESS) { |
| IDS_HDT_CONSOLE (GNB_TRACE, " Iommu Scratch Memory not allocated.\n"); |
| ASSERT (FALSE); |
| return AGESA_FATAL; |
| } |
| |
| AddressLow = (((UINT32) ((UINT64) AllocHeapParams.BufferPtr)) + 0x3F) & D0F0x98_x27_IOMMUUrAddr_31_6__MASK; |
| AddressHigh = ((UINT32) (((UINT64) AllocHeapParams.BufferPtr) >> 32)) & D0F0x98_x26_IOMMUUrAddr_39_32__MASK; |
| |
| GnbHandle = GnbGetHandle (StdHeader); |
| while (GnbHandle != NULL) { |
| if (GnbFmCheckIommuPresent (GnbHandle, StdHeader)) { |
| IDS_HDT_CONSOLE (GNB_TRACE, "Set Iommu Scratch Memory for Socket %d Silicon %d\n", GnbGetSocketId (GnbHandle) , GnbGetSiliconId (GnbHandle)); |
| GnbLibPciIndirectWrite ( |
| GnbHandle->Address.AddressValue | D0F0x94_ADDRESS, |
| D0F0x98_x27_ADDRESS | (1 << D0F0x94_OrbIndWrEn_OFFSET), |
| AccessS3SaveWidth32, |
| &AddressLow, |
| StdHeader); |
| |
| GnbLibPciIndirectWrite ( |
| GnbHandle->Address.AddressValue | D0F0x94_ADDRESS, |
| D0F0x98_x26_ADDRESS | (1 << D0F0x94_OrbIndWrEn_OFFSET), |
| AccessS3SaveWidth32, |
| &AddressHigh, |
| StdHeader); |
| } |
| GnbHandle = GnbGetNextHandle (GnbHandle); |
| } |
| |
| IDS_HDT_CONSOLE (GNB_TRACE, "GnbIommuScratchMemoryRangeInterface Exit\n"); |
| |
| return AGESA_SUCCESS; |
| } |
