| /* $NoKeywords:$ */ |
| /** |
| * @file |
| * |
| * FCH memory access lib |
| * |
| * |
| * |
| * @xrefitem bom "File Content Label" "Release Content" |
| * @e project: AGESA |
| * @e sub-project: FCH |
| * @e \$Revision: 63425 $ @e \$Date: 2011-12-22 11:24:10 -0600 (Thu, 22 Dec 2011) $ |
| * |
| */ |
| /* |
| ***************************************************************************** |
| * |
| * Copyright 2008 - 2012 ADVANCED MICRO DEVICES, INC. All Rights Reserved. |
| * |
| * AMD is granting you permission to use this software (the Materials) |
| * pursuant to the terms and conditions of your Software License Agreement |
| * with AMD. This header does *NOT* give you permission to use the Materials |
| * or any rights under AMD's intellectual property. Your use of any portion |
| * of these Materials shall constitute your acceptance of those terms and |
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| * License Agreement, please do not use any portion of these Materials. |
| * |
| * CONFIDENTIALITY: The Materials and all other information, identified as |
| * confidential and provided to you by AMD shall be kept confidential in |
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| * LIMITATION OF LIABILITY: THE MATERIALS AND ANY OTHER RELATED INFORMATION |
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| * |
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| * U.S. GOVERNMENT RESTRICTED RIGHTS: The Materials are provided with |
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| * subject to the restrictions as set forth in FAR 52.227-14 and |
| * DFAR252.227-7013, et seq., or its successor. Use of the Materials by the |
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| * |
| * EXPORT ASSURANCE: You agree and certify that neither the Materials, nor any |
| * direct product thereof will be exported directly or indirectly, into any |
| * country prohibited by the United States Export Administration Act and the |
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| * government nor will be used for any purpose prohibited by the same. |
| **************************************************************************** |
| */ |
| #include "FchPlatform.h" |
| #include "Ids.h" |
| #define FILECODE PROC_FCH_COMMON_MEMLIB_FILECODE |
| |
| |
| /** |
| * ReadMem - Read FCH BAR Memory |
| * |
| * @param[in] Address - Memory BAR address |
| * @param[in] OpFlag - Access width |
| * @param[in] *ValuePtr - In/Out value pointer |
| * |
| */ |
| VOID |
| ReadMem ( |
| IN UINT32 Address, |
| IN UINT8 OpFlag, |
| IN VOID *ValuePtr |
| ) |
| { |
| OpFlag = OpFlag & 0x7f; |
| |
| switch ( OpFlag ) { |
| case AccessWidth8: |
| *((UINT8*)ValuePtr) = *((UINT8*) ((UINTN)Address)); |
| break; |
| |
| case AccessWidth16: |
| *((UINT16*)ValuePtr) = *((UINT16*) ((UINTN)Address)); |
| break; |
| |
| case AccessWidth32: |
| *((UINT32*)ValuePtr) = *((UINT32*) ((UINTN)Address)); |
| break; |
| |
| default: |
| ASSERT (FALSE); |
| break; |
| } |
| } |
| |
| /** |
| * WriteMem - Write FCH BAR Memory |
| * |
| * @param[in] Address - Memory BAR address |
| * @param[in] OpFlag - Access width |
| * @param[in] *ValuePtr - In/Out Value pointer |
| * |
| */ |
| VOID |
| WriteMem ( |
| IN UINT32 Address, |
| IN UINT8 OpFlag, |
| IN VOID *ValuePtr |
| ) |
| { |
| OpFlag = OpFlag & 0x7f; |
| |
| switch ( OpFlag ) { |
| case AccessWidth8 : |
| *((UINT8*) ((UINTN)Address)) = *((UINT8*)ValuePtr); |
| break; |
| |
| case AccessWidth16: |
| *((UINT16*) ((UINTN)Address)) = *((UINT16*)ValuePtr); |
| break; |
| |
| case AccessWidth32: |
| *((UINT32*) ((UINTN)Address)) = *((UINT32*)ValuePtr); |
| break; |
| |
| default: |
| ASSERT (FALSE); |
| break; |
| } |
| } |
| |
| /** |
| * RwMem - Read & Write FCH BAR Memory |
| * |
| * @param[in] Address - Memory BAR address |
| * @param[in] OpFlag - Access width |
| * @param[in] Mask - Mask Value of data |
| * @param[in] Data - Write data |
| * |
| */ |
| VOID |
| RwMem ( |
| IN UINT32 Address, |
| IN UINT8 OpFlag, |
| IN UINT32 Mask, |
| IN UINT32 Data |
| ) |
| { |
| UINT32 Result; |
| |
| ReadMem (Address, OpFlag, &Result); |
| Result = (Result & Mask) | Data; |
| WriteMem (Address, OpFlag, &Result); |
| } |
| |