| chip northbridge/via/vx800 # Northbridge |
| device domain 0 on |
| device pci 0.0 on end # AGP Bridge |
| device pci 0.1 on end # Error Reporting |
| device pci 0.2 on end # Host Bus Control |
| device pci 0.3 on end # Memory Controller |
| device pci 0.4 on end # Power Management |
| device pci 0.7 on end # V-Link Controller |
| device pci 1.0 on end # PCI Bridge |
| # device pci f.0 on end # IDE/SATA |
| # device pci f.1 on end # IDE |
| # device pci 10.0 on end # USB 1.1 |
| # device pci 10.1 on end # USB 1.1 |
| # device pci 10.2 on end # USB 1.1 |
| # device pci 10.4 on end # USB 2.0 |
| # device pci 11.0 on # Southbridge LPC |
| # end |
| end |
| device cpu_cluster 0 on # APIC cluster |
| chip cpu/via/c7 # VIA C7 |
| device lapic 0 on end # APIC |
| end |
| end |
| end |