| #include <arch/pirq_routing.h> |
| |
| static const struct irq_routing_table intel_irq_routing_table = { |
| PIRQ_SIGNATURE, /* u32 signature */ |
| PIRQ_VERSION, /* u16 version */ |
| 32+16*CONFIG_IRQ_SLOT_COUNT, /* there can be total CONFIG_IRQ_SLOT_COUNT devices on the bus */ |
| 1, /* Where the interrupt router lies (bus) */ |
| (4<<3)|3, /* Where the interrupt router lies (dev) */ |
| 0x0, /* IRQs devoted exclusively to PCI usage */ |
| 0x1022, /* Vendor */ |
| 0x746b, /* Device */ |
| 0, /* Miniport data */ |
| { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, /* u8 rfu[11] */ |
| 0xb0, /* u8 checksum , mod 256 checksum must give zero */ |
| { /* bus, devfn, {link, bitmap}, {link, bitmap}, {link, bitmap}, {link, bitmap}, slot, rfu */ |
| /* PCI Slot 1 */ |
| {0x03, (0x01<<3)|0, {{0x02, 0xdef8}, {0x03, 0xdef8}, {0x04, 0xdef8}, {0x01, 0xdef8}}, 0x01, 0}, |
| /* PCI Slot 2 */ |
| {0x03, (0x02<<3)|0, {{0x03, 0xdef8}, {0x04, 0xdef8}, {0x01, 0xdef8}, {0x02, 0xdef8}}, 0x02, 0}, |
| /* PCI Slot 3 */ |
| {0x02, (0x01<<3)|0, {{0x02, 0xdef8}, {0x03, 0xdef8}, {0x04, 0xdef8}, {0x01, 0xdef8}}, 0x03, 0}, |
| /* PCI Slot 4 */ |
| {0x02, (0x02<<3)|0, {{0x03, 0xdef8}, {0x04, 0xdef8}, {0x01, 0xdef8}, {0x02, 0xdef8}}, 0x04, 0}, |
| /* PCI Slot 5 */ |
| {0x04, (0x05<<3)|0, {{0x02, 0xdef8}, {0x03, 0xdef8}, {0x04, 0xdef8}, {0x01, 0xdef8}}, 0x05, 0}, |
| /* PCI Slot 6 */ |
| {0x04, (0x04<<3)|0, {{0x01, 0xdef8}, {0x02, 0xdef8}, {0x03, 0xdef8}, {0x04, 0xdef8}}, 0x06, 0}, |
| /* Onboard NICS */ |
| {0x02, (0x03<<3)|0, {{0x04, 0xdef8}, {0x00, 0xdef8}, {0x00, 0xdef8}, {0x00, 0xdef8}}, 0x00, 0}, |
| {0x02, (0x04<<3)|0, {{0x04, 0xdef8}, {0x00, 0xdef8}, {0x00, 0xdef8}, {0x00, 0xdef8}}, 0x00, 0}, |
| /* Let Linux know about bus 1 */ |
| {0x01, (0x04<<3)|3, {{0x00, 0xdef8}, {0x00, 0xdef8}, {0x00, 0xdef8}, {0x00, 0xdef8}}, 0x00, 0}, |
| } |
| }; |
| |
| unsigned long write_pirq_routing_table(unsigned long addr) |
| { |
| return copy_pirq_routing_table(addr, &intel_irq_routing_table); |
| } |
