| ## |
| ## This file is part of the coreboot project. |
| ## |
| ## Copyright (C) 2007 AMD |
| ## Written by Yinghai Lu <yinghailu@amd.com> for AMD. |
| ## Copyright (C) 2010 Raptor Engineering |
| ## Written by Timothy Pearson <tpearson@raptorengineeringinc.com> for Raptor Engineering. |
| ## |
| ## This program is free software; you can redistribute it and/or modify |
| ## it under the terms of the GNU General Public License as published by |
| ## the Free Software Foundation; either version 2 of the License, or |
| ## (at your option) any later version. |
| ## |
| ## This program is distributed in the hope that it will be useful, |
| ## but WITHOUT ANY WARRANTY; without even the implied warranty of |
| ## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| ## GNU General Public License for more details. |
| ## |
| ## You should have received a copy of the GNU General Public License |
| ## along with this program; if not, write to the Free Software |
| ## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA |
| ## |
| |
| chip northbridge/amd/amdfam10/root_complex # Root complex |
| device cpu_cluster 0 on # (L)APIC cluster |
| chip cpu/amd/socket_F_1207 # CPU socket |
| device lapic 0 on end # Local APIC of the CPU |
| end |
| end |
| device domain 0 on # PCI domain |
| subsystemid 0x1462 0x9652 inherit |
| chip northbridge/amd/amdfam10 # Northbridge / RAM controller |
| device pci 18.0 on # Link 0 |
| chip southbridge/nvidia/mcp55 # Southbridge |
| device pci 0.0 on end # HT |
| device pci 1.0 on # LPC |
| chip superio/winbond/w83627ehg # Super I/O |
| device pnp 2e.0 on # Floppy |
| io 0x60 = 0x3f0 |
| irq 0x70 = 6 |
| drq 0x74 = 2 |
| end |
| device pnp 2e.1 off # Parallel port |
| io 0x60 = 0x378 |
| irq 0x70 = 7 |
| end |
| device pnp 2e.2 on # Com1 |
| io 0x60 = 0x3f8 |
| irq 0x70 = 4 |
| end |
| device pnp 2e.3 on # Com2 |
| io 0x60 = 0x2f8 |
| irq 0x70 = 3 |
| end |
| device pnp 2e.5 on # PS/2 keyboard & mouse |
| io 0x60 = 0x60 |
| io 0x62 = 0x64 |
| irq 0x70 = 1 |
| irq 0x72 = 12 |
| end |
| device pnp 2e.106 off # Serial flash interface (SFI) |
| io 0x60 = 0x100 |
| end |
| device pnp 2e.007 off # GPIO 1 |
| end |
| device pnp 2e.107 on # Game port |
| io 0x60 = 0x220 |
| end |
| device pnp 2e.207 on # MIDI |
| io 0x62 = 0x330 |
| irq 0x70 = 0xa |
| end |
| device pnp 2e.307 off # GPIO 6 |
| end |
| device pnp 2e.8 off # WDTO#, PLED |
| end |
| device pnp 2e.009 off # GPIO 2 |
| end |
| device pnp 2e.109 off # GPIO 3 |
| end |
| device pnp 2e.209 off # GPIO 4 |
| end |
| device pnp 2e.309 off # GPIO 5 |
| end |
| device pnp 2e.a off end # ACPI |
| device pnp 2e.b on # Hardware monitor |
| io 0x60 = 0x290 |
| irq 0x70 = 5 |
| end |
| end |
| end |
| device pci 1.1 on # SM 0 |
| chip drivers/generic/generic # DIMM 0-0-0 |
| device i2c 50 on end |
| end |
| chip drivers/generic/generic # DIMM 0-0-1 |
| device i2c 51 on end |
| end |
| chip drivers/generic/generic # DIMM 0-1-0 |
| device i2c 52 on end |
| end |
| chip drivers/generic/generic # DIMM 0-1-1 |
| device i2c 53 on end |
| end |
| chip drivers/generic/generic # DIMM 1-0-0 |
| device i2c 54 on end |
| end |
| chip drivers/generic/generic # DIMM 1-0-1 |
| device i2c 55 on end |
| end |
| chip drivers/generic/generic # DIMM 1-1-0 |
| device i2c 56 on end |
| end |
| chip drivers/generic/generic # DIMM 1-1-1 |
| device i2c 57 on end |
| end |
| end |
| device pci 1.1 on # SM 1 |
| # PCI device SMBus address will |
| # depend on addon PCI device, do |
| # we need to scan_smbus_bus? |
| # chip drivers/generic/generic # PCIXA slot 1 |
| # device i2c 50 on end |
| # end |
| # chip drivers/generic/generic # PCIXB slot 1 |
| # device i2c 51 on end |
| # end |
| # chip drivers/generic/generic # PCIXB slot 2 |
| # device i2c 52 on end |
| # end |
| # chip drivers/generic/generic # PCI slot 1 |
| # device i2c 53 on end |
| # end |
| # chip drivers/generic/generic # Master MCP55 PCI-E |
| # device i2c 54 on end |
| # end |
| # chip drivers/generic/generic # Slave MCP55 PCI-E |
| # device i2c 55 on end |
| # end |
| # chip drivers/generic/generic # MAC EEPROM |
| # device i2c 51 on end |
| # end |
| end |
| device pci 2.0 on end # USB 1.1 |
| device pci 2.1 on end # USB 2 |
| device pci 4.0 on end # IDE |
| device pci 5.0 on end # SATA 0 |
| device pci 5.1 on end # SATA 1 |
| device pci 5.2 on end # SATA 2 |
| device pci 6.1 on end # AZA |
| device pci 8.0 on end # NIC |
| device pci 9.0 on end # NIC |
| register "ide0_enable" = "1" |
| register "sata0_enable" = "1" |
| register "sata1_enable" = "1" |
| # 1: SMBus under 2e.8, 2: SM0 3: SM1 |
| register "mac_eeprom_smbus" = "3" |
| register "mac_eeprom_addr" = "0x51" |
| end |
| end |
| device pci 18.0 on end # HT 1.0 |
| device pci 18.0 on end # HT 2.0 |
| device pci 18.1 on end |
| device pci 18.2 on end |
| device pci 18.3 on end |
| device pci 18.4 on end |
| end |
| end |
| # chip drivers/generic/debug |
| # device pnp 0.0 off end # chip name |
| # device pnp 0.1 on end # pci_regs_all |
| # device pnp 0.2 on end # mem |
| # device pnp 0.3 off end # cpuid |
| # device pnp 0.4 on end # smbus_regs_all |
| # device pnp 0.5 off end # dual core msr |
| # device pnp 0.6 off end # cache size |
| # device pnp 0.7 off end # tsc |
| # device pnp 0.8 off end # io |
| # device pnp 0.9 off end # io |
| # end |
| end |
