| ## |
| ## This file is part of the coreboot project. |
| ## |
| ## Copyright (C) 2010 Joseph Smith <joe@settoplinux.org> |
| ## |
| ## This program is free software; you can redistribute it and/or modify |
| ## it under the terms of the GNU General Public License as published by |
| ## the Free Software Foundation; either version 2 of the License, or |
| ## (at your option) any later version. |
| ## |
| ## This program is distributed in the hope that it will be useful, |
| ## but WITHOUT ANY WARRANTY; without even the implied warranty of |
| ## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| ## GNU General Public License for more details. |
| ## |
| ## You should have received a copy of the GNU General Public License |
| ## along with this program; if not, write to the Free Software |
| ## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA |
| ## |
| |
| ramstage-y += socket_FC_PGA370.c |
| subdirs-y += ../model_68x |
| subdirs-y += ../../x86/tsc |
| subdirs-y += ../../x86/mtrr |
| subdirs-y += ../../x86/lapic |
| subdirs-y += ../../x86/cache |
| subdirs-y += ../../x86/smm |
| subdirs-y += ../microcode |
| |
| cpu_incs += $(src)/cpu/intel/car/cache_as_ram.inc |
