tree f610e89e874ecb183b70f3018b26b92aed23f8ee
parent 8454b95567359eec79febccf5dd9767737f7a760
author Angel Pons <th3fanbus@gmail.com> 1588431099 +0200
committer Commit Bot <commit-bot@chromium.org> 1589332287 +0000

UPSTREAM: nb/intel/sandybridge: Reorder IOSAV writes

We only write to the IOSAV LFSR registers twice, but we do so between
the writes to the other four IOSAV per-subsequence registers. Since we
know that the IOSAV is sleeping when we program the subsequences, we
might as well do the two oddball LFSR register writes after we have
programmed the always-written-to group of four registers. That way,
subsequent changes can reproducibly replace the four writes with a
single macro.

Tested on Asus P8Z77-V LX2, still boots.

BUG=none
BRANCH=none
TEST=none

Change-Id: Ia49259382abc353f8502b97226409d257f89608f
Signed-off-by: Patrick Georgi <pgeorgi@google.com>
Original-Commit-Id: c36cd07f9eb6cf3858b0ddc187e22cfd32b600c7
Original-Change-Id: If7bb14a9862a53a3eba565d17401347dcc9ffbe9
Original-Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Original-Reviewed-on: https://review.coreboot.org/c/coreboot/+/40973
Original-Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
Original-Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/third_party/coreboot/+/2196451
Reviewed-by: Patrick Georgi <pgeorgi@chromium.org>
Tested-by: Patrick Georgi <pgeorgi@chromium.org>
Commit-Queue: Patrick Georgi <pgeorgi@chromium.org>