commit bcd81f1fdfd17940aadb36696d3cb81909d7b51f
author Gabe Black <gabeblack@google.com> Tue Oct 01 05:29:03 2013 -0700
committer chrome-internal-fetch <chrome-internal-fetch@google.com> Wed Oct 02 09:19:02 2013 +0000
tree c627f601cad9283134b0a5d7faa1b1e6533c8dfb
parent c1aa76b7607ee40ff848628971a97eea5393aebe

ARM: Remove the hack which excluded assembly barriers for tegra124 bootblock.

Now that the tegra124 bootblock is compiled using ARMv4 code, this hack is no
longer necessary.

BUG=chrome-os-partner:23009
TEST=Built and booted into the bootblock on nyan. Built for link, snow, falco,
and pit.
BRANCH=None

Change-Id: I5b7fe5e45e15f878089542a04bd20d6c607b0f69
Signed-off-by: Gabe Black <gabeblack@google.com>
Reviewed-on: https://chromium-review.googlesource.com/171403
Reviewed-by: Gabe Black <gabeblack@chromium.org>
Tested-by: Gabe Black <gabeblack@chromium.org>
Commit-Queue: Gabe Black <gabeblack@chromium.org>

src/arch/arm/include/armv7/arch/cache.h

diff --git a/src/arch/arm/include/armv7/arch/cache.h b/src/arch/arm/include/armv7/arch/cache.h
index 3734608..db745b8 100644
--- a/src/arch/arm/include/armv7/arch/cache.h
+++ b/src/arch/arm/include/armv7/arch/cache.h
@@ -75,25 +75,19 @@
 /* data memory barrier */
 static inline void dmb(void)
 {
-#if !defined(CONFIG_SOC_NVIDIA_TEGRA124) || !defined(__BOOT_BLOCK__)
 	asm volatile ("dmb" : : : "memory");
-#endif
 }
 
 /* data sync barrier */
 static inline void dsb(void)
 {
-#if !defined(CONFIG_SOC_NVIDIA_TEGRA124) || !defined(__BOOT_BLOCK__)
 	asm volatile ("dsb" : : : "memory");
-#endif
 }
 
 /* instruction sync barrier */
 static inline void isb(void)
 {
-#if !defined(CONFIG_SOC_NVIDIA_TEGRA124) || !defined(__BOOT_BLOCK__)
 	asm volatile ("isb" : : : "memory");
-#endif
 }
 
 /*