blob: fec40ef36e1f0aff316819434f4413e25d0d8728 [file] [log] [blame]
/*
* This file is part of the coreboot project.
*
* Copyright (C) 2007 Uwe Hermann <uwe@hermann-uwe.de>
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
*/
#ifndef SOUTHBRIDGE_AMD_CS5530_CHIP_H
#define SOUTHBRIDGE_AMD_CS5530_CHIP_H
struct southbridge_amd_cs5530_config {
int ide0_enable:1;
int ide1_enable:1;
};
#endif /* SOUTHBRIDGE_AMD_CS5530_CHIP_H */