UPSTREAM: soc/intel/baytrail: Remove trailing space in log message
Currently, there is a trailing space in the log message below.
> Enabling VR PS2 mode: VNN VCC
So, put the space before the word.
BUG=none
BRANCH=none
TEST=none
Change-Id: I7ebc02c513945a01cdaadfeccfb3c256cbf1bbc3
Signed-off-by: Patrick Georgi <pgeorgi@google.com>
Original-Commit-Id: 63ebb5bde1572e49dfa1c9ef627e486cd01b8163
Original-Change-Id: Ic536d77aa910b1b98a3c2f35d595dee4251b1c18
Original-Signed-off-by: Paul Menzel <pmenzel@molgen.mpg.de>
Original-Reviewed-on: https://review.coreboot.org/28525
Original-Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Original-Reviewed-by: Patrick Rudolph <siro@das-labor.org>
Original-Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://chromium-review.googlesource.com/1219452
Commit-Ready: Patrick Georgi <pgeorgi@chromium.org>
Tested-by: Patrick Georgi <pgeorgi@chromium.org>
Reviewed-by: Patrick Georgi <pgeorgi@chromium.org>
diff --git a/src/soc/intel/baytrail/romstage/pmc.c b/src/soc/intel/baytrail/romstage/pmc.c
index c2d3ed2..b47f7df 100644
--- a/src/soc/intel/baytrail/romstage/pmc.c
+++ b/src/soc/intel/baytrail/romstage/pmc.c
@@ -55,14 +55,14 @@
/* Configure VR low power mode for C0 and above. */
if (rid >= RID_C_STEPPING_START && cfg != NULL &&
(cfg->vnn_ps2_enable || cfg->vcc_ps2_enable)) {
- printk(BIOS_DEBUG, "Enabling VR PS2 mode: ");
+ printk(BIOS_DEBUG, "Enabling VR PS2 mode:");
if (cfg->vnn_ps2_enable) {
reg |= SB_BIOS_CONFIG_PS2_EN_VNN;
- printk(BIOS_DEBUG, "VNN ");
+ printk(BIOS_DEBUG, " VNN");
}
if (cfg->vcc_ps2_enable) {
reg |= SB_BIOS_CONFIG_PS2_EN_VCC;
- printk(BIOS_DEBUG, "VCC ");
+ printk(BIOS_DEBUG, " VCC");
}
printk(BIOS_DEBUG, "\n");
}
