| commit | 63e41b0861da631bafac30fece31823b3ef01246 | [log] [tgz] |
|---|---|---|
| author | Yuji Sasaki <sasakiy@chromium.org> | Fri Sep 20 12:43:09 2019 -0700 |
| committer | Commit Bot <commit-bot@chromium.org> | Mon Sep 23 23:40:59 2019 +0000 |
| tree | 8e2d0435b3eb183ec80cf0ff0ce2d4577708a76b | |
| parent | 0c80aea92ef1751bb317e6dbdbb6bb27cb7c0498 [diff] |
google/mistral: fix flicking green in fdr_press pattern For "Breathing" LED pattern, we use "ramp" instruction of LP5562 LED controller. As we cannot specify exact duration with LP5562 ramp instruction, duration error always exists and there is possibility that one engine(Green) ending up one extreme edge of error while another engine(Red) ending up another edge which causes flicking green in "Breathing Yellow" pattern. This issue is observed with few specific RGB values of Yellow (ex: 188,129,0). This CL mitigates the issue by inserting wait instruction between two ramp instructions to compensate ramp error, and to use zero-base rounding (NOT to +0.5). More information about issue and solution approach at http://go/xxoxu BUG=b:140589512 TEST=Compiled and verified FDR Press pattern doesn't have Green with Yellow-(188,129,0). BRANCH=mistral Signed-off-by: Yuji Sasaki <sasakiy@chromium.org> Change-Id: Ia0bdd2b20faa4e8593079aae9d134d494d23cf8d Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/third_party/coreboot/+/1817007 Reviewed-by: Patrick Georgi <pgeorgi@chromium.org> Commit-Queue: Yuji Sasaki <sasakiy@chromium.org> Tested-by: Yuji Sasaki <sasakiy@chromium.org> Auto-Submit: Yuji Sasaki <sasakiy@chromium.org>
coreboot is a Free Software project aimed at replacing the proprietary BIOS (firmware) found in most computers. coreboot performs a little bit of hardware initialization and then executes additional boot logic, called a payload.
With the separation of hardware initialization and later boot logic, coreboot can scale from specialized applications that run directly firmware, run operating systems in flash, load custom bootloaders, or implement firmware standards, like PC BIOS services or UEFI. This allows for systems to only include the features necessary in the target application, reducing the amount of code and flash space required.
coreboot was formerly known as LinuxBIOS.
After the basic initialization of the hardware has been performed, any desired “payload” can be started by coreboot.
See https://www.coreboot.org/Payloads for a list of supported payloads.
coreboot supports a wide range of chipsets, devices, and mainboards.
For details please consult:
ANY_TOOLCHAIN Kconfig option if you’re feeling lucky (no support in this case).Optional:
make menuconfig and make nconfig)Please consult https://www.coreboot.org/Build_HOWTO for details.
If you want to test coreboot without any risks before you really decide to use it on your hardware, you can use the QEMU system emulator to run coreboot virtually in QEMU.
Please see https://www.coreboot.org/QEMU for details.
Further details on the project, a FAQ, many HOWTOs, news, development guidelines and more can be found on the coreboot website:
You can contact us directly on the coreboot mailing list:
https://www.coreboot.org/Mailinglist
The copyright on coreboot is owned by quite a large number of individual developers and companies. Please check the individual source files for details.
coreboot is licensed under the terms of the GNU General Public License (GPL). Some files are licensed under the “GPL (version 2, or any later version)”, and some files are licensed under the “GPL, version 2”. For some parts, which were derived from other projects, other (GPL-compatible) licenses may apply. Please check the individual source files for details.
This makes the resulting coreboot images licensed under the GPL, version 2.