menu "Architecture (x86)"

config X86_ARCH_OPTIONS
	bool
	default y
	select HAVE_ARCH_MEMSET
	select HAVE_ARCH_MEMCPY
	select HAVE_ARCH_MEMMOVE

config MARK_GRAPHICS_MEM_WRCOMB
	bool "Mark graphics memory as write-combining."
	default n
	help
	 The graphics performance may increase if the graphics
	 memory is set as write-combining cache type. This option
	 enables marking the graphics memory as write-combining.

# This is an SMP option. It relates to starting up APs.
# It is usually set in mainboard/*/Kconfig.
# TODO: Improve description.
config AP_IN_SIPI_WAIT
	bool
	default n
	depends on ARCH_X86 && SMP

# Aligns 16bit entry code in bootblock so that hyper-threading CPUs
# can boot AP CPUs to enable their shared caches.
config SIPI_VECTOR_IN_ROM
	bool
	default n
	depends on ARCH_X86

config RAMBASE
	hex
	default 0x100000

config RAMTOP
	hex
	default 0x200000

config STACK_SIZE
	hex
	default 0x1000

# Maximum reboot count
# TODO: Improve description.
config MAX_REBOOT_CNT
	int
	default 3

# We had to rename the choice options under arch/ because otherwise
# the options would conflict between different architectures despite
# the if ARCH_xxx guarding the arch/xxx/Kconfig sourcing.
choice
	prompt "Bootblock behaviour"
	default X86_BOOTBLOCK_SIMPLE

config X86_BOOTBLOCK_SIMPLE
	bool "Always load fallback"

config X86_BOOTBLOCK_NORMAL
	bool "Switch to normal if CMOS says so"

endchoice

config BOOTBLOCK_SOURCE
	string
	default "bootblock_simple.c" if X86_BOOTBLOCK_SIMPLE
	default "bootblock_normal.c" if X86_BOOTBLOCK_NORMAL

config UPDATE_IMAGE
	bool "Update existing coreboot.rom image"
	default n
	help
	  If this option is enabled, no new coreboot.rom file
	  is created. Instead it is expected that there already
	  is a suitable file for further processing.
	  The bootblock will not be modified.

config ROMCC
	bool
	default n

config PC80_SYSTEM
	bool
	default y

config BOOTBLOCK_MAINBOARD_INIT
	string

config BOOTBLOCK_NORTHBRIDGE_INIT
	string

config HAVE_CMOS_DEFAULT
	def_bool n

config CMOS_DEFAULT_FILE
	string
	depends on HAVE_CMOS_DEFAULT

config BOOTBLOCK_SOUTHBRIDGE_INIT
	string

config IOAPIC_INTERRUPTS_ON_FSB
	bool
	default y if !IOAPIC_INTERRUPTS_ON_APIC_SERIAL_BUS

config IOAPIC_INTERRUPTS_ON_APIC_SERIAL_BUS
	bool
	default n

config HPET_ADDRESS
	hex
	default 0xfed00000 if !HPET_ADDRESS_OVERRIDE

config ID_SECTION_OFFSET
	hex
	default 0x80

endmenu