diff --git a/src/arch/armv7/Makefile.inc b/src/arch/armv7/Makefile.inc
index 38edd03..82c3564 100644
--- a/src/arch/armv7/Makefile.inc
+++ b/src/arch/armv7/Makefile.inc
@@ -61,7 +61,7 @@
 	mv $(obj)/coreboot.rom $@
 endif
 
-$(obj)/coreboot.rom: $(obj)/coreboot.pre $(objcbfs)/coreboot_ram.elf $(CBFSTOOL) $(call strip_quotes,$(COREBOOT_ROM_DEPENDENCIES)) $$(INTERMEDIATE)
+$(obj)/coreboot.rom: $(obj)/coreboot.pre $(objcbfs)/coreboot_ram.elf $(CBFSTOOL) $(call strip_quotes,$(COREBOOT_ROM_DEPENDENCIES))
 	@printf "    CBFS       $(subst $(obj)/,,$(@))\n"
 	cp $(obj)/coreboot.pre $@.tmp
 	$(CBFSTOOL) $@.tmp add-stage -f $(objcbfs)/coreboot_ram.elf -n $(CONFIG_CBFS_PREFIX)/coreboot_ram -c $(CBFS_COMPRESS_FLAG)
diff --git a/src/cpu/samsung/exynos5250/Makefile.inc b/src/cpu/samsung/exynos5250/Makefile.inc
index 6b89e65..5e50735 100644
--- a/src/cpu/samsung/exynos5250/Makefile.inc
+++ b/src/cpu/samsung/exynos5250/Makefile.inc
@@ -1,8 +1,3 @@
-# Run an intermediate step when producing coreboot.rom
-# that adds additional components to the final firmware
-# image outside of CBFS
-INTERMEDIATE += exynos5250_add_bl1
-
 bootblock-y += spi.c alternate_cbfs.c
 bootblock-y += pinmux.c mct.c power.c
 # Clock is required for UART
@@ -54,6 +49,11 @@
 ramstage-y += usb.c
 ramstage-y += cbmem.c
 
+# Run an intermediate step when producing coreboot.rom
+# that adds additional components to the final firmware
+# image outside of CBFS
+.PHONY: exynos5250_add_bl1
+$(obj)/coreboot.rom: exynos5250_add_bl1
 exynos5250_add_bl1: $(obj)/coreboot.pre
 	printf "    DD         Adding Samsung Exynos5250 BL1\n"
 	dd if=3rdparty/cpu/samsung/exynos5250/bl1.bin \
diff --git a/src/cpu/samsung/exynos5420/Makefile.inc b/src/cpu/samsung/exynos5420/Makefile.inc
index 87c6db3..a29ee4c 100644
--- a/src/cpu/samsung/exynos5420/Makefile.inc
+++ b/src/cpu/samsung/exynos5420/Makefile.inc
@@ -1,8 +1,3 @@
-# Run an intermediate step when producing coreboot.rom
-# that adds additional components to the final firmware
-# image outside of CBFS
-INTERMEDIATE += exynos5420_add_bl1
-
 bootblock-y += spi.c alternate_cbfs.c
 bootblock-y += pinmux.c mct.c power.c
 # Clock is required for UART
@@ -60,6 +55,11 @@
 VBOOT_STUB_DEPS += $(obj)/cpu/samsung/exynos5420/monotonic_timer.rmodules.o
 VBOOT_STUB_DEPS += $(obj)/cpu/samsung/exynos5420/mct.rmodules.o
 
+# Run an intermediate step when producing coreboot.rom
+# that adds additional components to the final firmware
+# image outside of CBFS
+.PHONY: exynos5420_add_bl1
+$(obj)/coreboot.rom: exynos5420_add_bl1
 exynos5420_add_bl1: $(obj)/coreboot.pre
 	printf "    DD         Adding Samsung Exynos5420 BL1\n"
 	dd if=3rdparty/cpu/samsung/exynos5420/bl1.bin \