ARM: Generalize armv7 as arm.
There are ARM systems which are essentially heterogeneous multicores where
some cores implement a different ARM architecture version than other cores. A
specific example is the tegra124 which boots on an ARMv4 coprocessor while
most code, including most of the firmware, runs on the main ARMv7 core. To
support SOCs like this, the plan is to generalize the ARM architecture so that
all versions are available, and an SOC/CPU can then select what architecture
variant should be used for each component of the firmware; bootblock,
romstage, and ramstage.
BUG=chrome-os-partner:23009
TEST=Built libpayload and coreboot for link, pit and nyan. Booted into the
bootblock on nyan.
BRANCH=None
Change-Id: I22e048c3bc72bd56371e14200942e436c1e312c2
Signed-off-by: Gabe Black <gabeblack@google.com>
Reviewed-on: https://chromium-review.googlesource.com/171338
Reviewed-by: Gabe Black <gabeblack@chromium.org>
Commit-Queue: Gabe Black <gabeblack@chromium.org>
Tested-by: Gabe Black <gabeblack@chromium.org>
diff --git a/Makefile b/Makefile
index e2be68b..78fbf74 100644
--- a/Makefile
+++ b/Makefile
@@ -113,14 +113,14 @@
include $(HAVE_DOTCONFIG)
-ARCHDIR-$(CONFIG_ARCH_ARMV7) := armv7
+ARCHDIR-$(CONFIG_ARCH_ARM) := arm
ARCHDIR-$(CONFIG_ARCH_X86) := x86
ARCH-y := $(ARCHDIR-y)
# If architecture folder name is different from GCC binutils architecture name,
# override here.
-ARCH-$(CONFIG_ARCH_ARMV7) := armv7
+ARCH-$(CONFIG_ARCH_ARM) := arm
ARCH-$(CONFIG_ARCH_X86) := i386
ifneq ($(INNER_SCANBUILD),y)
diff --git a/payloads/libpayload/Config.in b/payloads/libpayload/Config.in
index f08f355..112f6a1 100644
--- a/payloads/libpayload/Config.in
+++ b/payloads/libpayload/Config.in
@@ -67,10 +67,10 @@
prompt "Target Architecture"
default ARCH_X86
-config ARCH_ARMV7
- bool "ARMv7"
+config ARCH_ARM
+ bool "ARM"
help
- Support the x86 architecture
+ Support the ARM architecture
config ARCH_X86
bool "x86"
diff --git a/payloads/libpayload/Makefile b/payloads/libpayload/Makefile
index 6416519..d84b63b 100644
--- a/payloads/libpayload/Makefile
+++ b/payloads/libpayload/Makefile
@@ -91,14 +91,14 @@
include $(HAVE_DOTCONFIG)
-ARCHDIR-$(CONFIG_LP_ARCH_ARMV7) := armv7
+ARCHDIR-$(CONFIG_LP_ARCH_ARM) := arm
ARCHDIR-$(CONFIG_LP_ARCH_X86) := x86
ARCH-y := $(ARCHDIR-y)
# If architecture folder name is different from GCC binutils architecture name,
# override here.
-ARCH-$(CONFIG_LP_ARCH_ARMV7) := armv7
+ARCH-$(CONFIG_LP_ARCH_ARM) := arm
ARCH-$(CONFIG_LP_ARCH_X86) := i386
CC := $(CC_$(ARCH-y))
diff --git a/payloads/libpayload/Makefile.inc b/payloads/libpayload/Makefile.inc
index 6005a4d..b5c0bb5 100644
--- a/payloads/libpayload/Makefile.inc
+++ b/payloads/libpayload/Makefile.inc
@@ -31,7 +31,7 @@
export KERNELVERSION := 0.2.0
-ARCHDIR-$(CONFIG_LP_ARCH_ARMV7) := armv7
+ARCHDIR-$(CONFIG_LP_ARCH_ARM) := arm
ARCHDIR-$(CONFIG_LP_ARCH_X86) := x86
DESTDIR ?= install
diff --git a/payloads/libpayload/arch/Config.in b/payloads/libpayload/arch/Config.in
index 1049da0..541f64f 100644
--- a/payloads/libpayload/arch/Config.in
+++ b/payloads/libpayload/arch/Config.in
@@ -27,5 +27,5 @@
## SUCH DAMAGE.
##
-source "arch/armv7/Config.in"
+source "arch/arm/Config.in"
source "arch/x86/Config.in"
diff --git a/payloads/libpayload/arch/armv7/Config.in b/payloads/libpayload/arch/arm/Config.in
similarity index 98%
rename from payloads/libpayload/arch/armv7/Config.in
rename to payloads/libpayload/arch/arm/Config.in
index 79cd676..b2ee527 100644
--- a/payloads/libpayload/arch/armv7/Config.in
+++ b/payloads/libpayload/arch/arm/Config.in
@@ -27,7 +27,7 @@
## SUCH DAMAGE.
##
-if ARCH_ARMV7
+if ARCH_ARM
config ARCH_SPECIFIC_OPTIONS # dummy
def_bool y
diff --git a/payloads/libpayload/arch/armv7/Makefile.inc b/payloads/libpayload/arch/arm/Makefile.inc
similarity index 100%
rename from payloads/libpayload/arch/armv7/Makefile.inc
rename to payloads/libpayload/arch/arm/Makefile.inc
diff --git a/payloads/libpayload/arch/armv7/assembler.h b/payloads/libpayload/arch/arm/assembler.h
similarity index 100%
rename from payloads/libpayload/arch/armv7/assembler.h
rename to payloads/libpayload/arch/arm/assembler.h
diff --git a/payloads/libpayload/arch/armv7/cache.c b/payloads/libpayload/arch/arm/cache.c
similarity index 99%
rename from payloads/libpayload/arch/armv7/cache.c
rename to payloads/libpayload/arch/arm/cache.c
index 1f466ce..acd1f9a 100644
--- a/payloads/libpayload/arch/armv7/cache.c
+++ b/payloads/libpayload/arch/arm/cache.c
@@ -276,7 +276,7 @@
write_sctlr(sctlr);
}
-void armv7_invalidate_caches(void)
+void arm_invalidate_caches(void)
{
uint32_t clidr;
int level;
diff --git a/payloads/libpayload/arch/armv7/coreboot.c b/payloads/libpayload/arch/arm/coreboot.c
similarity index 100%
rename from payloads/libpayload/arch/armv7/coreboot.c
rename to payloads/libpayload/arch/arm/coreboot.c
diff --git a/payloads/libpayload/arch/armv7/dummy_media.c b/payloads/libpayload/arch/arm/dummy_media.c
similarity index 100%
rename from payloads/libpayload/arch/armv7/dummy_media.c
rename to payloads/libpayload/arch/arm/dummy_media.c
diff --git a/payloads/libpayload/arch/armv7/exception.c b/payloads/libpayload/arch/arm/exception.c
similarity index 100%
rename from payloads/libpayload/arch/armv7/exception.c
rename to payloads/libpayload/arch/arm/exception.c
diff --git a/payloads/libpayload/arch/armv7/exception_asm.S b/payloads/libpayload/arch/arm/exception_asm.S
similarity index 100%
rename from payloads/libpayload/arch/armv7/exception_asm.S
rename to payloads/libpayload/arch/arm/exception_asm.S
diff --git a/payloads/libpayload/arch/armv7/head.S b/payloads/libpayload/arch/arm/head.S
similarity index 100%
rename from payloads/libpayload/arch/armv7/head.S
rename to payloads/libpayload/arch/arm/head.S
diff --git a/payloads/libpayload/arch/armv7/libpayload.ldscript b/payloads/libpayload/arch/arm/libpayload.ldscript
similarity index 100%
rename from payloads/libpayload/arch/armv7/libpayload.ldscript
rename to payloads/libpayload/arch/arm/libpayload.ldscript
diff --git a/payloads/libpayload/arch/armv7/main.c b/payloads/libpayload/arch/arm/main.c
similarity index 100%
rename from payloads/libpayload/arch/armv7/main.c
rename to payloads/libpayload/arch/arm/main.c
diff --git a/payloads/libpayload/arch/armv7/memcpy.S b/payloads/libpayload/arch/arm/memcpy.S
similarity index 100%
rename from payloads/libpayload/arch/armv7/memcpy.S
rename to payloads/libpayload/arch/arm/memcpy.S
diff --git a/payloads/libpayload/arch/armv7/memset.S b/payloads/libpayload/arch/arm/memset.S
similarity index 100%
rename from payloads/libpayload/arch/armv7/memset.S
rename to payloads/libpayload/arch/arm/memset.S
diff --git a/payloads/libpayload/arch/armv7/sysinfo.c b/payloads/libpayload/arch/arm/sysinfo.c
similarity index 100%
rename from payloads/libpayload/arch/armv7/sysinfo.c
rename to payloads/libpayload/arch/arm/sysinfo.c
diff --git a/payloads/libpayload/arch/armv7/timer.c b/payloads/libpayload/arch/arm/timer.c
similarity index 96%
rename from payloads/libpayload/arch/armv7/timer.c
rename to payloads/libpayload/arch/arm/timer.c
index 9449c9f..3902308 100644
--- a/payloads/libpayload/arch/armv7/timer.c
+++ b/payloads/libpayload/arch/arm/timer.c
@@ -28,8 +28,8 @@
*/
/**
- * @file armv7/timer.c
- * ARMv7 specific timer routines
+ * @file arm/timer.c
+ * ARM specific timer routines
*/
#include <libpayload.h>
diff --git a/payloads/libpayload/arch/armv7/util.S b/payloads/libpayload/arch/arm/util.S
similarity index 100%
rename from payloads/libpayload/arch/armv7/util.S
rename to payloads/libpayload/arch/arm/util.S
diff --git a/payloads/libpayload/arch/armv7/virtual.c b/payloads/libpayload/arch/arm/virtual.c
similarity index 100%
rename from payloads/libpayload/arch/armv7/virtual.c
rename to payloads/libpayload/arch/arm/virtual.c
diff --git a/payloads/libpayload/bin/lpgcc b/payloads/libpayload/bin/lpgcc
index 8760dd6..bf3d830 100755
--- a/payloads/libpayload/bin/lpgcc
+++ b/payloads/libpayload/bin/lpgcc
@@ -107,9 +107,9 @@
shift
done
-if [ "$CONFIG_LP_ARCH_ARMV7" = "y" ]; then
- _ARCHINCDIR=$_INCDIR/armv7
- _ARCHLIBDIR=$_LIBDIR/armv7
+if [ "$CONFIG_LP_ARCH_ARM" = "y" ]; then
+ _ARCHINCDIR=$_INCDIR/arm
+ _ARCHLIBDIR=$_LIBDIR/arm
_ARCHEXTRA=""
fi
diff --git a/payloads/libpayload/configs/config.bayleybay b/payloads/libpayload/configs/config.bayleybay
index 16fddc8..2a1e504 100644
--- a/payloads/libpayload/configs/config.bayleybay
+++ b/payloads/libpayload/configs/config.bayleybay
@@ -15,7 +15,7 @@
#
# Architecture Options
#
-# CONFIG_LP_ARCH_ARMV7 is not set
+# CONFIG_LP_ARCH_ARM is not set
CONFIG_LP_ARCH_X86=y
# CONFIG_LP_MEMMAP_RAM_ONLY is not set
# CONFIG_LP_MULTIBOOT is not set
diff --git a/payloads/libpayload/configs/config.beltino b/payloads/libpayload/configs/config.beltino
index 7c92f1a..44fa634 100644
--- a/payloads/libpayload/configs/config.beltino
+++ b/payloads/libpayload/configs/config.beltino
@@ -15,7 +15,7 @@
#
# Architecture Options
#
-# CONFIG_LP_ARCH_ARMV7 is not set
+# CONFIG_LP_ARCH_ARM is not set
# CONFIG_LP_ARCH_POWERPC is not set
CONFIG_LP_ARCH_X86=y
# CONFIG_LP_MEMMAP_RAM_ONLY is not set
diff --git a/payloads/libpayload/configs/config.bolt b/payloads/libpayload/configs/config.bolt
index 177f437..ef57458 100644
--- a/payloads/libpayload/configs/config.bolt
+++ b/payloads/libpayload/configs/config.bolt
@@ -15,7 +15,7 @@
#
# Architecture Options
#
-# CONFIG_LP_ARCH_ARMV7 is not set
+# CONFIG_LP_ARCH_ARM is not set
# CONFIG_LP_ARCH_POWERPC is not set
CONFIG_LP_ARCH_X86=y
# CONFIG_LP_MEMMAP_RAM_ONLY is not set
diff --git a/payloads/libpayload/configs/config.daisy b/payloads/libpayload/configs/config.daisy
index fc38917..6b01b8f 100644
--- a/payloads/libpayload/configs/config.daisy
+++ b/payloads/libpayload/configs/config.daisy
@@ -15,7 +15,7 @@
#
# Architecture Options
#
-CONFIG_LP_ARCH_ARMV7=y
+CONFIG_LP_ARCH_ARM=y
# CONFIG_LP_ARCH_POWERPC is not set
# CONFIG_LP_ARCH_X86 is not set
# CONFIG_LP_MEMMAP_RAM_ONLY is not set
diff --git a/payloads/libpayload/configs/config.falco b/payloads/libpayload/configs/config.falco
index 177f437..ef57458 100644
--- a/payloads/libpayload/configs/config.falco
+++ b/payloads/libpayload/configs/config.falco
@@ -15,7 +15,7 @@
#
# Architecture Options
#
-# CONFIG_LP_ARCH_ARMV7 is not set
+# CONFIG_LP_ARCH_ARM is not set
# CONFIG_LP_ARCH_POWERPC is not set
CONFIG_LP_ARCH_X86=y
# CONFIG_LP_MEMMAP_RAM_ONLY is not set
diff --git a/payloads/libpayload/configs/config.fox_baskingridge b/payloads/libpayload/configs/config.fox_baskingridge
index b0f76d5..6f4f1ab 100644
--- a/payloads/libpayload/configs/config.fox_baskingridge
+++ b/payloads/libpayload/configs/config.fox_baskingridge
@@ -15,7 +15,7 @@
#
# Architecture Options
#
-# CONFIG_LP_ARCH_ARMV7 is not set
+# CONFIG_LP_ARCH_ARM is not set
# CONFIG_LP_ARCH_POWERPC is not set
CONFIG_LP_ARCH_X86=y
# CONFIG_LP_MEMMAP_RAM_ONLY is not set
diff --git a/payloads/libpayload/configs/config.fox_wtm2 b/payloads/libpayload/configs/config.fox_wtm2
index 177f437..ef57458 100644
--- a/payloads/libpayload/configs/config.fox_wtm2
+++ b/payloads/libpayload/configs/config.fox_wtm2
@@ -15,7 +15,7 @@
#
# Architecture Options
#
-# CONFIG_LP_ARCH_ARMV7 is not set
+# CONFIG_LP_ARCH_ARM is not set
# CONFIG_LP_ARCH_POWERPC is not set
CONFIG_LP_ARCH_X86=y
# CONFIG_LP_MEMMAP_RAM_ONLY is not set
diff --git a/payloads/libpayload/configs/config.link b/payloads/libpayload/configs/config.link
index b0f76d5..6f4f1ab 100644
--- a/payloads/libpayload/configs/config.link
+++ b/payloads/libpayload/configs/config.link
@@ -15,7 +15,7 @@
#
# Architecture Options
#
-# CONFIG_LP_ARCH_ARMV7 is not set
+# CONFIG_LP_ARCH_ARM is not set
# CONFIG_LP_ARCH_POWERPC is not set
CONFIG_LP_ARCH_X86=y
# CONFIG_LP_MEMMAP_RAM_ONLY is not set
diff --git a/payloads/libpayload/configs/config.lumpy b/payloads/libpayload/configs/config.lumpy
index b0f76d5..6f4f1ab 100644
--- a/payloads/libpayload/configs/config.lumpy
+++ b/payloads/libpayload/configs/config.lumpy
@@ -15,7 +15,7 @@
#
# Architecture Options
#
-# CONFIG_LP_ARCH_ARMV7 is not set
+# CONFIG_LP_ARCH_ARM is not set
# CONFIG_LP_ARCH_POWERPC is not set
CONFIG_LP_ARCH_X86=y
# CONFIG_LP_MEMMAP_RAM_ONLY is not set
diff --git a/payloads/libpayload/configs/config.nyan b/payloads/libpayload/configs/config.nyan
index d6213eb..42c817e4 100644
--- a/payloads/libpayload/configs/config.nyan
+++ b/payloads/libpayload/configs/config.nyan
@@ -15,7 +15,7 @@
#
# Architecture Options
#
-CONFIG_LP_ARCH_ARMV7=y
+CONFIG_LP_ARCH_ARM=y
# CONFIG_LP_ARCH_POWERPC is not set
# CONFIG_LP_ARCH_X86 is not set
# CONFIG_LP_MEMMAP_RAM_ONLY is not set
diff --git a/payloads/libpayload/configs/config.peach_kirby b/payloads/libpayload/configs/config.peach_kirby
index 92a0ac7..9b78a89 100644
--- a/payloads/libpayload/configs/config.peach_kirby
+++ b/payloads/libpayload/configs/config.peach_kirby
@@ -15,7 +15,7 @@
#
# Architecture Options
#
-CONFIG_LP_ARCH_ARMV7=y
+CONFIG_LP_ARCH_ARM=y
# CONFIG_LP_ARCH_POWERPC is not set
# CONFIG_LP_ARCH_X86 is not set
# CONFIG_LP_MEMMAP_RAM_ONLY is not set
diff --git a/payloads/libpayload/configs/config.peach_pit b/payloads/libpayload/configs/config.peach_pit
index 049e2b2..b7671bf 100644
--- a/payloads/libpayload/configs/config.peach_pit
+++ b/payloads/libpayload/configs/config.peach_pit
@@ -15,7 +15,7 @@
#
# Architecture Options
#
-CONFIG_LP_ARCH_ARMV7=y
+CONFIG_LP_ARCH_ARM=y
# CONFIG_LP_ARCH_POWERPC is not set
# CONFIG_LP_ARCH_X86 is not set
# CONFIG_LP_MEMMAP_RAM_ONLY is not set
diff --git a/payloads/libpayload/configs/config.peppy b/payloads/libpayload/configs/config.peppy
index 177f437..ef57458 100644
--- a/payloads/libpayload/configs/config.peppy
+++ b/payloads/libpayload/configs/config.peppy
@@ -15,7 +15,7 @@
#
# Architecture Options
#
-# CONFIG_LP_ARCH_ARMV7 is not set
+# CONFIG_LP_ARCH_ARM is not set
# CONFIG_LP_ARCH_POWERPC is not set
CONFIG_LP_ARCH_X86=y
# CONFIG_LP_MEMMAP_RAM_ONLY is not set
diff --git a/payloads/libpayload/configs/config.slippy b/payloads/libpayload/configs/config.slippy
index 177f437..ef57458 100644
--- a/payloads/libpayload/configs/config.slippy
+++ b/payloads/libpayload/configs/config.slippy
@@ -15,7 +15,7 @@
#
# Architecture Options
#
-# CONFIG_LP_ARCH_ARMV7 is not set
+# CONFIG_LP_ARCH_ARM is not set
# CONFIG_LP_ARCH_POWERPC is not set
CONFIG_LP_ARCH_X86=y
# CONFIG_LP_MEMMAP_RAM_ONLY is not set
diff --git a/payloads/libpayload/configs/defconfig b/payloads/libpayload/configs/defconfig
index 10e494c..597aaa6 100644
--- a/payloads/libpayload/configs/defconfig
+++ b/payloads/libpayload/configs/defconfig
@@ -15,7 +15,7 @@
#
# Architecture Options
#
-# CONFIG_LP_ARCH_ARMV7 is not set
+# CONFIG_LP_ARCH_ARM is not set
# CONFIG_LP_ARCH_POWERPC is not set
CONFIG_LP_ARCH_X86=y
# CONFIG_LP_MEMMAP_RAM_ONLY is not set
diff --git a/payloads/libpayload/include/armv7/arch/cache.h b/payloads/libpayload/include/arm/arch/cache.h
similarity index 97%
rename from payloads/libpayload/include/armv7/arch/cache.h
rename to payloads/libpayload/include/arm/arch/cache.h
index 1cd9958..ffdb55a 100644
--- a/payloads/libpayload/include/armv7/arch/cache.h
+++ b/payloads/libpayload/include/arm/arch/cache.h
@@ -26,11 +26,11 @@
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
* SUCH DAMAGE.
*
- * cache.h: Cache maintenance API for ARMv7
+ * cache.h: Cache maintenance API for ARM
*/
-#ifndef ARMV7_CACHE_H
-#define ARMV7_CACHE_H
+#ifndef ARM_CACHE_H
+#define ARM_CACHE_H
#include <stddef.h>
#include <stdint.h>
@@ -320,8 +320,8 @@
* Generalized setup/init functions
*/
-/* invalidate all caches on ARMv7 */
-void armv7_invalidate_caches(void);
+/* invalidate all caches on ARM */
+void arm_invalidate_caches(void);
/* mmu initialization (set page table address, set permissions, etc) */
void mmu_init(void);
@@ -338,4 +338,4 @@
void mmu_config_range(unsigned long start_mb, unsigned long size_mb,
enum dcache_policy policy);
-#endif /* ARMV7_CACHE_H */
+#endif /* ARM_CACHE_H */
diff --git a/payloads/libpayload/include/armv7/arch/exception.h b/payloads/libpayload/include/arm/arch/exception.h
similarity index 100%
rename from payloads/libpayload/include/armv7/arch/exception.h
rename to payloads/libpayload/include/arm/arch/exception.h
diff --git a/payloads/libpayload/include/armv7/arch/io.h b/payloads/libpayload/include/arm/arch/io.h
similarity index 100%
rename from payloads/libpayload/include/armv7/arch/io.h
rename to payloads/libpayload/include/arm/arch/io.h
diff --git a/payloads/libpayload/include/armv7/arch/types.h b/payloads/libpayload/include/arm/arch/types.h
similarity index 100%
rename from payloads/libpayload/include/armv7/arch/types.h
rename to payloads/libpayload/include/arm/arch/types.h
diff --git a/payloads/libpayload/include/armv7/arch/virtual.h b/payloads/libpayload/include/arm/arch/virtual.h
similarity index 100%
rename from payloads/libpayload/include/armv7/arch/virtual.h
rename to payloads/libpayload/include/arm/arch/virtual.h
diff --git a/payloads/libpayload/include/cbfs_core.h b/payloads/libpayload/include/cbfs_core.h
index b197158..9d8ef45 100644
--- a/payloads/libpayload/include/cbfs_core.h
+++ b/payloads/libpayload/include/cbfs_core.h
@@ -106,7 +106,7 @@
*/
#define CBFS_ARCHITECTURE_UNKNOWN 0xFFFFFFFF
#define CBFS_ARCHITECTURE_X86 0x00000001
-#define CBFS_ARCHITECTURE_ARMV7 0x00000010
+#define CBFS_ARCHITECTURE_ARM 0x00000010
/** This is a component header - every entry in the CBFS
will have this header.
diff --git a/payloads/libpayload/util/xcompile/xcompile b/payloads/libpayload/util/xcompile/xcompile
index 09c1879..755fb18 100644
--- a/payloads/libpayload/util/xcompile/xcompile
+++ b/payloads/libpayload/util/xcompile/xcompile
@@ -106,7 +106,7 @@
CFLAGS="$CFLAGS -Wl,--build-id=none"
case "$architecture" in
- armv7 )
+ arm )
# testcc "$CC" "$CFLAGS -mcpu=cortex-a9" &&
# CFLAGS="$CFLAGS -mcpu=cortex-a9"
;;
@@ -135,13 +135,13 @@
trap clean_up EXIT
# Architecture definition
-SUPPORTED_ARCHITECTURE="x86 armv7"
+SUPPORTED_ARCHITECTURE="x86 arm"
# ARM Architecture
-TARCH_armv7="armv7"
-TBFDARCH_armv7="littlearm"
-TCLIST_armv7="armv7a"
-TWIDTH_armv7="32"
+TARCH_arm="arm"
+TBFDARCH_arm="littlearm"
+TCLIST_arm="armv7a"
+TWIDTH_arm="32"
# X86 Architecture
TARCH_x86="i386"
diff --git a/payloads/tianocoreboot/libpayload.config b/payloads/tianocoreboot/libpayload.config
index c7c0720..e63fee8 100644
--- a/payloads/tianocoreboot/libpayload.config
+++ b/payloads/tianocoreboot/libpayload.config
@@ -15,7 +15,7 @@
#
# Architecture Options
#
-# CONFIG_ARCH_ARMV7 is not set
+# CONFIG_ARCH_ARM is not set
# CONFIG_ARCH_POWERPC is not set
CONFIG_ARCH_X86=y
# CONFIG_MEMMAP_RAM_ONLY is not set
diff --git a/src/Kconfig b/src/Kconfig
index 7449bb5..7f25ebd 100644
--- a/src/Kconfig
+++ b/src/Kconfig
@@ -222,7 +222,7 @@
default n
select PCI
-config ARCH_ARMV7
+config ARCH_ARM
bool
default n
@@ -232,8 +232,8 @@
source src/arch/x86/Kconfig
endif
-if ARCH_ARMV7
-source src/arch/armv7/Kconfig
+if ARCH_ARM
+source src/arch/arm/Kconfig
endif
config HAVE_ARCH_MEMSET
@@ -275,7 +275,7 @@
bool
default n
select LPC_TPM if ARCH_X86
- select I2C_TPM if ARCH_ARMV7
+ select I2C_TPM if ARCH_ARM
help
Enable this option to enable TPM support in coreboot.
@@ -303,7 +303,7 @@
config HAVE_UART_IO_MAPPED
bool
default y if ARCH_X86
- default n if ARCH_ARMV7
+ default n if ARCH_ARM
config HAVE_UART_MEMORY_MAPPED
bool
diff --git a/src/arch/armv7/Kconfig b/src/arch/arm/Kconfig
similarity index 97%
rename from src/arch/armv7/Kconfig
rename to src/arch/arm/Kconfig
index 99e857c..28444d4 100644
--- a/src/arch/armv7/Kconfig
+++ b/src/arch/arm/Kconfig
@@ -1,4 +1,4 @@
-menu "Architecture (armv7)"
+menu "Architecture (arm)"
config ARM_ARCH_OPTIONS
diff --git a/src/arch/armv7/Makefile.inc b/src/arch/arm/Makefile.inc
similarity index 89%
rename from src/arch/armv7/Makefile.inc
rename to src/arch/arm/Makefile.inc
index 11a5e78..b6fd84c 100644
--- a/src/arch/armv7/Makefile.inc
+++ b/src/arch/arm/Makefile.inc
@@ -38,7 +38,7 @@
bootblock-y += bootblock.S
endif
bootblock-y += id.S
-$(obj)/arch/armv7/id.bootblock.o: $(obj)/build.h
+$(obj)/arch/arm/id.bootblock.o: $(obj)/build.h
bootblock-$(CONFIG_ARM_BOOTBLOCK_SIMPLE) += bootblock_simple.c
bootblock-$(CONFIG_ARM_BOOTBLOCK_NORMAL) += bootblock_normal.c
@@ -79,7 +79,7 @@
rmodules-y += memmove.S
rmodules-y += eabi_compat.c
-VBOOT_STUB_DEPS += $(obj)/arch/armv7/eabi_compat.rmodules.o
+VBOOT_STUB_DEPS += $(obj)/arch/arm/eabi_compat.rmodules.o
romstage-$(CONFIG_COLLECT_TIMESTAMPS) += timestamp.c
ramstage-$(CONFIG_COLLECT_TIMESTAMPS) += timestamp.c
@@ -87,7 +87,7 @@
ramstage-srcs += src/mainboard/$(MAINBOARDDIR)/mainboard.c
################################################################################
-# armv7 specific tools
+# arm specific tools
################################################################################
# Common recipes for all stages
@@ -134,7 +134,7 @@
# TODO Change -b to Kconfig variable.
$(obj)/coreboot.pre1: $(objcbfs)/bootblock.bin $$(prebuilt-files) $(CBFSTOOL) $$(cpu_ucode_cbfs_file)
- $(CBFSTOOL) $@.tmp create -m armv7 -s $(CONFIG_COREBOOT_ROMSIZE_KB)K \
+ $(CBFSTOOL) $@.tmp create -m arm -s $(CONFIG_COREBOOT_ROMSIZE_KB)K \
-B $(objcbfs)/bootblock.bin -a 64 \
-b $(CONFIG_BOOTBLOCK_ROM_OFFSET) \
-H $(CONFIG_CBFS_HEADER_ROM_OFFSET) \
@@ -173,34 +173,34 @@
################################################################################
# Build the bootblock
-$(objcbfs)/bootblock.debug: $(src)/arch/armv7/bootblock.ld $(obj)/ldoptions $$(bootblock-objs) $(obj)/config.h
+$(objcbfs)/bootblock.debug: $(src)/arch/arm/bootblock.ld $(obj)/ldoptions $$(bootblock-objs) $(obj)/config.h
@printf " LINK $(subst $(obj)/,,$(@))\n"
ifeq ($(CONFIG_COMPILER_LLVM_CLANG),y)
- $(LD) -m armelf_linux_eabi -static -o $@ -L$(obj) $< -T $(src)/arch/armv7/bootblock.ld
+ $(LD) -m armelf_linux_eabi -static -o $@ -L$(obj) $< -T $(src)/arch/arm/bootblock.ld
else
- $(CC) $(CFLAGS) -nostartfiles -include $(obj)/config.h -static -o $@ -L$(obj) -T $(src)/arch/armv7/bootblock.ld -Wl,--start-group $(bootblock-objs) $(LIBGCC_FILE_NAME) -Wl,--end-group
+ $(CC) $(CFLAGS) -nostartfiles -include $(obj)/config.h -static -o $@ -L$(obj) -T $(src)/arch/arm/bootblock.ld -Wl,--start-group $(bootblock-objs) $(LIBGCC_FILE_NAME) -Wl,--end-group
endif
################################################################################
# Build the romstage
-$(objcbfs)/romstage.debug: $$(romstage-objs) $(src)/arch/armv7/romstage.ld $(obj)/ldoptions
+$(objcbfs)/romstage.debug: $$(romstage-objs) $(src)/arch/arm/romstage.ld $(obj)/ldoptions
@printf " LINK $(subst $(obj)/,,$(@))\n"
ifeq ($(CONFIG_COMPILER_LLVM_CLANG),y)
- $(LD) -nostdlib -nostartfiles -static -o $@ -L$(obj) $(romstage-objs) -T $(src)/arch/armv7/romstage.ld
+ $(LD) -nostdlib -nostartfiles -static -o $@ -L$(obj) $(romstage-objs) -T $(src)/arch/arm/romstage.ld
else
- $(CC) $(CFLAGS) -nostartfiles -static -o $@ -L$(obj) -T $(src)/arch/armv7/romstage.ld -Wl,--start-group $(romstage-objs) $(LIBGCC_FILE_NAME) -Wl,--end-group
+ $(CC) $(CFLAGS) -nostartfiles -static -o $@ -L$(obj) -T $(src)/arch/arm/romstage.ld -Wl,--start-group $(romstage-objs) $(LIBGCC_FILE_NAME) -Wl,--end-group
endif
################################################################################
# Build the ramstage
-$(objcbfs)/coreboot_ram.debug: $$(ramstage-objs) $(LIBGCC_FILE_NAME) $(src)/arch/armv7/coreboot_ram.ld $(obj)/ldoptions
+$(objcbfs)/coreboot_ram.debug: $$(ramstage-objs) $(LIBGCC_FILE_NAME) $(src)/arch/arm/coreboot_ram.ld $(obj)/ldoptions
@printf " CC $(subst $(obj)/,,$(@))\n"
ifeq ($(CONFIG_COMPILER_LLVM_CLANG),y)
- $(LD) -m -m armelf_linux_eabi -o $@ --wrap __divdi3 --wrap __udivdi3 --wrap __moddi3 --wrap __umoddi3 --wrap __uidiv --start-group $(ramstage-objs) $(LIBGCC_FILE_NAME) --end-group -T $(src)/arch/armv7/coreboot_ram.ld
+ $(LD) -m -m armelf_linux_eabi -o $@ --wrap __divdi3 --wrap __udivdi3 --wrap __moddi3 --wrap __umoddi3 --wrap __uidiv --start-group $(ramstage-objs) $(LIBGCC_FILE_NAME) --end-group -T $(src)/arch/arm/coreboot_ram.ld
else
- $(CC) $(CFLAGS) -nostartfiles -static -o $@ -L$(obj) -Wl,--start-group $(ramstage-objs) $(LIBGCC_FILE_NAME) -Wl,--end-group -T $(src)/arch/armv7/coreboot_ram.ld
+ $(CC) $(CFLAGS) -nostartfiles -static -o $@ -L$(obj) -Wl,--start-group $(ramstage-objs) $(LIBGCC_FILE_NAME) -Wl,--end-group -T $(src)/arch/arm/coreboot_ram.ld
endif
################################################################################
diff --git a/src/arch/armv7/boot.c b/src/arch/arm/boot.c
similarity index 100%
rename from src/arch/armv7/boot.c
rename to src/arch/arm/boot.c
diff --git a/src/arch/armv7/bootblock.S b/src/arch/arm/bootblock.S
similarity index 98%
rename from src/arch/armv7/bootblock.S
rename to src/arch/arm/bootblock.S
index b28a787..f2f528a 100644
--- a/src/arch/armv7/bootblock.S
+++ b/src/arch/arm/bootblock.S
@@ -1,5 +1,5 @@
/*
- * Early initialization code for ARMv7 architecture.
+ * Early initialization code for ARM architecture.
*
* This file is based off of the OMAP3530/ARM Cortex start.S file from Das
* U-Boot, which itself got the file from armboot.
diff --git a/src/arch/armv7/bootblock.ld b/src/arch/arm/bootblock.ld
similarity index 100%
rename from src/arch/armv7/bootblock.ld
rename to src/arch/arm/bootblock.ld
diff --git a/src/arch/armv7/bootblock_simple.c b/src/arch/arm/bootblock_simple.c
similarity index 97%
rename from src/arch/armv7/bootblock_simple.c
rename to src/arch/arm/bootblock_simple.c
index d607485..809441b 100644
--- a/src/arch/armv7/bootblock_simple.c
+++ b/src/arch/arm/bootblock_simple.c
@@ -38,7 +38,7 @@
sctlr &= ~(SCTLR_M | SCTLR_C | SCTLR_Z | SCTLR_I);
write_sctlr(sctlr);
- armv7_invalidate_caches();
+ arm_invalidate_caches();
/*
* Re-enable icache and branch prediction. MMU and dcache will be
diff --git a/payloads/libpayload/arch/armv7/cache.c b/src/arch/arm/cache.c
similarity index 99%
copy from payloads/libpayload/arch/armv7/cache.c
copy to src/arch/arm/cache.c
index 1f466ce..acd1f9a 100644
--- a/payloads/libpayload/arch/armv7/cache.c
+++ b/src/arch/arm/cache.c
@@ -276,7 +276,7 @@
write_sctlr(sctlr);
}
-void armv7_invalidate_caches(void)
+void arm_invalidate_caches(void)
{
uint32_t clidr;
int level;
diff --git a/src/arch/armv7/coreboot_ram.ld b/src/arch/arm/coreboot_ram.ld
similarity index 98%
rename from src/arch/armv7/coreboot_ram.ld
rename to src/arch/arm/coreboot_ram.ld
index 8731fdf..ea6bc79 100644
--- a/src/arch/armv7/coreboot_ram.ld
+++ b/src/arch/arm/coreboot_ram.ld
@@ -33,7 +33,7 @@
.text : {
_text = .;
_start = .;
- *(.text.stage_entry.armv7);
+ *(.text.stage_entry.arm);
*(.text);
*(.text.*);
. = ALIGN(16);
diff --git a/src/arch/armv7/cpu.c b/src/arch/arm/cpu.c
similarity index 100%
rename from src/arch/armv7/cpu.c
rename to src/arch/arm/cpu.c
diff --git a/src/arch/armv7/div0.c b/src/arch/arm/div0.c
similarity index 100%
rename from src/arch/armv7/div0.c
rename to src/arch/arm/div0.c
diff --git a/src/arch/armv7/eabi_compat.c b/src/arch/arm/eabi_compat.c
similarity index 100%
rename from src/arch/armv7/eabi_compat.c
rename to src/arch/arm/eabi_compat.c
diff --git a/src/arch/armv7/early_console.c b/src/arch/arm/early_console.c
similarity index 100%
rename from src/arch/armv7/early_console.c
rename to src/arch/arm/early_console.c
diff --git a/src/arch/armv7/exception.c b/src/arch/arm/exception.c
similarity index 100%
rename from src/arch/armv7/exception.c
rename to src/arch/arm/exception.c
diff --git a/src/arch/armv7/exception_asm.S b/src/arch/arm/exception_asm.S
similarity index 100%
rename from src/arch/armv7/exception_asm.S
rename to src/arch/arm/exception_asm.S
diff --git a/src/arch/armv7/id.S b/src/arch/arm/id.S
similarity index 100%
rename from src/arch/armv7/id.S
rename to src/arch/arm/id.S
diff --git a/src/arch/armv7/include/arch/boot/boot.h b/src/arch/arm/include/arch/boot/boot.h
similarity index 100%
rename from src/arch/armv7/include/arch/boot/boot.h
rename to src/arch/arm/include/arch/boot/boot.h
diff --git a/src/arch/armv7/include/arch/byteorder.h b/src/arch/arm/include/arch/byteorder.h
similarity index 100%
rename from src/arch/armv7/include/arch/byteorder.h
rename to src/arch/arm/include/arch/byteorder.h
diff --git a/src/arch/armv7/include/arch/cache.h b/src/arch/arm/include/arch/cache.h
similarity index 97%
rename from src/arch/armv7/include/arch/cache.h
rename to src/arch/arm/include/arch/cache.h
index 437be83..3734608 100644
--- a/src/arch/armv7/include/arch/cache.h
+++ b/src/arch/arm/include/arch/cache.h
@@ -26,11 +26,11 @@
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
* SUCH DAMAGE.
*
- * cache.h: Cache maintenance API for ARMv7
+ * cache.h: Cache maintenance API for ARM
*/
-#ifndef ARMV7_CACHE_H
-#define ARMV7_CACHE_H
+#ifndef ARM_CACHE_H
+#define ARM_CACHE_H
#include <config.h>
#include <stddef.h>
@@ -327,8 +327,8 @@
* Generalized setup/init functions
*/
-/* invalidate all caches on ARMv7 */
-void armv7_invalidate_caches(void);
+/* invalidate all caches on ARM */
+void arm_invalidate_caches(void);
/* mmu initialization (set page table address, set permissions, etc) */
void mmu_init(void);
@@ -345,4 +345,4 @@
void mmu_config_range(unsigned long start_mb, unsigned long size_mb,
enum dcache_policy policy);
-#endif /* ARMV7_CACHE_H */
+#endif /* ARM_CACHE_H */
diff --git a/src/arch/armv7/include/arch/cpu.h b/src/arch/arm/include/arch/cpu.h
similarity index 100%
rename from src/arch/armv7/include/arch/cpu.h
rename to src/arch/arm/include/arch/cpu.h
diff --git a/src/arch/armv7/include/arch/early_variables.h b/src/arch/arm/include/arch/early_variables.h
similarity index 100%
rename from src/arch/armv7/include/arch/early_variables.h
rename to src/arch/arm/include/arch/early_variables.h
diff --git a/src/arch/armv7/include/arch/exception.h b/src/arch/arm/include/arch/exception.h
similarity index 100%
rename from src/arch/armv7/include/arch/exception.h
rename to src/arch/arm/include/arch/exception.h
diff --git a/src/arch/armv7/include/arch/hlt.h b/src/arch/arm/include/arch/hlt.h
similarity index 100%
rename from src/arch/armv7/include/arch/hlt.h
rename to src/arch/arm/include/arch/hlt.h
diff --git a/src/arch/armv7/include/arch/io.h b/src/arch/arm/include/arch/io.h
similarity index 100%
rename from src/arch/armv7/include/arch/io.h
rename to src/arch/arm/include/arch/io.h
diff --git a/src/arch/armv7/include/arch/pci_ops.h b/src/arch/arm/include/arch/pci_ops.h
similarity index 93%
rename from src/arch/armv7/include/arch/pci_ops.h
rename to src/arch/arm/include/arch/pci_ops.h
index 4bbb7d3..1a9b4a1 100644
--- a/src/arch/armv7/include/arch/pci_ops.h
+++ b/src/arch/arm/include/arch/pci_ops.h
@@ -17,8 +17,8 @@
* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
*/
-#ifndef ARCH_ARMV7_PCI_OPS_H
-#define ARCH_ARMV7_PCI_OPS_H
+#ifndef ARCH_ARM_PCI_OPS_H
+#define ARCH_ARM_PCI_OPS_H
static inline const struct pci_bus_operations *pci_config_default(void)
{
diff --git a/src/arch/armv7/include/arch/stages.h b/src/arch/arm/include/arch/stages.h
similarity index 98%
rename from src/arch/armv7/include/arch/stages.h
rename to src/arch/arm/include/arch/stages.h
index 3fd54b9..e580835 100644
--- a/src/arch/armv7/include/arch/stages.h
+++ b/src/arch/arm/include/arch/stages.h
@@ -22,7 +22,7 @@
extern void main(void);
-void stage_entry(void) __attribute__((section(".text.stage_entry.armv7")));
+void stage_entry(void) __attribute__((section(".text.stage_entry.arm")));
void stage_exit(void *);
void jmp_to_elf_entry(void *entry, unsigned long buffer, unsigned long size);
diff --git a/src/arch/armv7/include/arch/types.h b/src/arch/arm/include/arch/types.h
similarity index 100%
rename from src/arch/armv7/include/arch/types.h
rename to src/arch/arm/include/arch/types.h
diff --git a/src/arch/armv7/include/armv7.h b/src/arch/arm/include/armv7.h
similarity index 100%
rename from src/arch/armv7/include/armv7.h
rename to src/arch/arm/include/armv7.h
diff --git a/src/arch/armv7/include/assembler.h b/src/arch/arm/include/assembler.h
similarity index 100%
rename from src/arch/armv7/include/assembler.h
rename to src/arch/arm/include/assembler.h
diff --git a/src/arch/armv7/include/bootblock_common.h b/src/arch/arm/include/bootblock_common.h
similarity index 100%
rename from src/arch/armv7/include/bootblock_common.h
rename to src/arch/arm/include/bootblock_common.h
diff --git a/src/arch/armv7/include/clocks.h b/src/arch/arm/include/clocks.h
similarity index 100%
rename from src/arch/armv7/include/clocks.h
rename to src/arch/arm/include/clocks.h
diff --git a/src/arch/armv7/include/smp/spinlock.h b/src/arch/arm/include/smp/spinlock.h
similarity index 100%
rename from src/arch/armv7/include/smp/spinlock.h
rename to src/arch/arm/include/smp/spinlock.h
diff --git a/src/arch/armv7/include/stdint.h b/src/arch/arm/include/stdint.h
similarity index 100%
rename from src/arch/armv7/include/stdint.h
rename to src/arch/arm/include/stdint.h
diff --git a/src/arch/armv7/include/utils.h b/src/arch/arm/include/utils.h
similarity index 100%
rename from src/arch/armv7/include/utils.h
rename to src/arch/arm/include/utils.h
diff --git a/src/arch/armv7/memcpy.S b/src/arch/arm/memcpy.S
similarity index 100%
rename from src/arch/armv7/memcpy.S
rename to src/arch/arm/memcpy.S
diff --git a/src/arch/armv7/memmove.S b/src/arch/arm/memmove.S
similarity index 100%
rename from src/arch/armv7/memmove.S
rename to src/arch/arm/memmove.S
diff --git a/src/arch/armv7/memset.S b/src/arch/arm/memset.S
similarity index 100%
rename from src/arch/armv7/memset.S
rename to src/arch/arm/memset.S
diff --git a/src/arch/armv7/mmu.c b/src/arch/arm/mmu.c
similarity index 100%
rename from src/arch/armv7/mmu.c
rename to src/arch/arm/mmu.c
diff --git a/src/arch/armv7/romstage.ld b/src/arch/arm/romstage.ld
similarity index 98%
rename from src/arch/armv7/romstage.ld
rename to src/arch/arm/romstage.ld
index f0a1e4c..bdf669d 100644
--- a/src/arch/armv7/romstage.ld
+++ b/src/arch/arm/romstage.ld
@@ -39,7 +39,7 @@
.romtext . : {
_rom = .;
_start = .;
- *(.text.stage_entry.armv7);
+ *(.text.stage_entry.arm);
*(.text.startup);
*(.text);
}
diff --git a/src/arch/armv7/stages.c b/src/arch/arm/stages.c
similarity index 100%
rename from src/arch/armv7/stages.c
rename to src/arch/arm/stages.c
diff --git a/src/arch/armv7/tables.c b/src/arch/arm/tables.c
similarity index 100%
rename from src/arch/armv7/tables.c
rename to src/arch/arm/tables.c
diff --git a/src/arch/armv7/thread.c b/src/arch/arm/thread.c
similarity index 100%
rename from src/arch/armv7/thread.c
rename to src/arch/arm/thread.c
diff --git a/src/arch/armv7/timestamp.c b/src/arch/arm/timestamp.c
similarity index 100%
rename from src/arch/armv7/timestamp.c
rename to src/arch/arm/timestamp.c
diff --git a/src/arch/armv7/cache.c b/src/arch/armv7/cache.c
deleted file mode 100644
index 1f466ce..0000000
--- a/src/arch/armv7/cache.c
+++ /dev/null
@@ -1,328 +0,0 @@
-/*
- * This file is part of the coreboot project.
- *
- * Copyright 2013 Google Inc.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- * 3. The name of the author may not be used to endorse or promote products
- * derived from this software without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- * cache.c: Cache maintenance routines for ARMv7-A and ARMv7-R
- *
- * Reference: ARM Architecture Reference Manual, ARMv7-A and ARMv7-R edition
- */
-
-#include <stdint.h>
-
-#include <arch/cache.h>
-
-#define bitmask(high, low) ((1UL << (high)) + \
- ((1UL << (high)) - 1) - ((1UL << (low)) - 1))
-
-/* Basic log2() implementation. Note: log2(0) is 0 for our purposes. */
-/* FIXME: src/include/lib.h is difficult to work with due to romcc */
-static unsigned long log2(unsigned long u)
-{
- int i = 0;
-
- while (u >>= 1)
- i++;
-
- return i;
-}
-
-void tlb_invalidate_all(void)
-{
- /*
- * FIXME: ARMv7 Architecture Ref. Manual claims that the distinction
- * instruction vs. data TLBs is deprecated in ARMv7, however this does
- * not seem to be the case as of Cortex-A15.
- */
- tlbiall();
- dtlbiall();
- itlbiall();
- isb();
- dsb();
-}
-
-void icache_invalidate_all(void)
-{
- /*
- * icache can be entirely invalidated with one operation.
- * Note: If branch predictors are architecturally-visible, ICIALLU
- * also performs a BPIALL operation (B2-1283 in arch manual)
- */
- iciallu();
- isb();
-}
-
-enum dcache_op {
- OP_DCCSW,
- OP_DCCISW,
- OP_DCISW,
- OP_DCCIMVAC,
- OP_DCCMVAC,
- OP_DCIMVAC,
-};
-
-/*
- * Do a dcache operation on entire cache by set/way. This is done for
- * portability because mapping of memory address to cache location is
- * implementation defined (See note on "Requirements for operations by
- * set/way" in arch ref. manual).
- */
-static void dcache_op_set_way(enum dcache_op op)
-{
- uint32_t ccsidr;
- unsigned int associativity, num_sets, linesize_bytes;
- unsigned int set, way;
- unsigned int level;
-
- level = (read_csselr() >> 1) & 0x7;
-
- /*
- * dcache must be invalidated by set/way for portability since virtual
- * memory mapping is system-defined. The number of sets and
- * associativity is given by CCSIDR. We'll use DCISW to invalidate the
- * dcache.
- */
- ccsidr = read_ccsidr();
-
- /* FIXME: rounding up required here? */
- num_sets = ((ccsidr & bitmask(27, 13)) >> 13) + 1;
- associativity = ((ccsidr & bitmask(12, 3)) >> 3) + 1;
- /* FIXME: do we need to use CTR.DminLine here? */
- linesize_bytes = (1 << ((ccsidr & 0x7) + 2)) * 4;
-
- dsb();
-
- /*
- * Set/way operations require an interesting bit packing. See section
- * B4-35 in the ARMv7 Architecture Reference Manual:
- *
- * A: Log2(associativity)
- * B: L+S
- * L: Log2(linesize)
- * S: Log2(num_sets)
- *
- * The bits are packed as follows:
- * 31 31-A B B-1 L L-1 4 3 1 0
- * |---|-------------|--------|-------|-----|-|
- * |Way| zeros | Set | zeros |level|0|
- * |---|-------------|--------|-------|-----|-|
- */
- for (way = 0; way < associativity; way++) {
- for (set = 0; set < num_sets; set++) {
- uint32_t val = 0;
- val |= way << (32 - log2(associativity));
- val |= set << log2(linesize_bytes);
- val |= level << 1;
- switch(op) {
- case OP_DCCISW:
- dccisw(val);
- break;
- case OP_DCISW:
- dcisw(val);
- break;
- case OP_DCCSW:
- dccsw(val);
- break;
- default:
- break;
- }
- }
- }
- isb();
-}
-
-static void dcache_foreach(enum dcache_op op)
-{
- uint32_t clidr;
- int level;
-
- clidr = read_clidr();
- for (level = 0; level < 7; level++) {
- unsigned int ctype = (clidr >> (level * 3)) & 0x7;
- uint32_t csselr;
-
- switch(ctype) {
- case 0x2:
- case 0x3:
- case 0x4:
- csselr = level << 1;
- write_csselr(csselr);
- dcache_op_set_way(op);
- break;
- default:
- /* no cache, icache only, or reserved */
- break;
- }
- }
-}
-
-void dcache_clean_all(void)
-{
- dcache_foreach(OP_DCCSW);
-}
-
-void dcache_clean_invalidate_all(void)
-{
- dcache_foreach(OP_DCCISW);
-}
-
-void dcache_invalidate_all(void)
-{
- dcache_foreach(OP_DCISW);
-}
-
-static unsigned int line_bytes(void)
-{
- uint32_t ccsidr;
- unsigned int size;
-
- ccsidr = read_ccsidr();
- /* [2:0] - Indicates (Log2(number of words in cache line)) - 2 */
- size = 1 << ((ccsidr & 0x7) + 2); /* words per line */
- size *= sizeof(unsigned int); /* bytes per line */
-
- return size;
-}
-
-/*
- * Do a dcache operation by modified virtual address. This is useful for
- * maintaining coherency in drivers which do DMA transfers and only need to
- * perform cache maintenance on a particular memory range rather than the
- * entire cache.
- */
-static void dcache_op_mva(void const *addr, size_t len, enum dcache_op op)
-{
- unsigned long line, linesize;
-
- linesize = line_bytes();
- line = (uint32_t)addr & ~(linesize - 1);
-
- dsb();
- while ((void *)line < addr + len) {
- switch(op) {
- case OP_DCCIMVAC:
- dccimvac(line);
- break;
- case OP_DCCMVAC:
- dccmvac(line);
- break;
- case OP_DCIMVAC:
- dcimvac(line);
- break;
- default:
- break;
- }
- line += linesize;
- }
- isb();
-}
-
-void dcache_clean_by_mva(void const *addr, size_t len)
-{
- dcache_op_mva(addr, len, OP_DCCMVAC);
-}
-
-void dcache_clean_invalidate_by_mva(void const *addr, size_t len)
-{
- dcache_op_mva(addr, len, OP_DCCIMVAC);
-}
-
-void dcache_invalidate_by_mva(void const *addr, size_t len)
-{
- dcache_op_mva(addr, len, OP_DCIMVAC);
-}
-
-void dcache_mmu_disable(void)
-{
- uint32_t sctlr;
-
- dcache_clean_invalidate_all();
- sctlr = read_sctlr();
- sctlr &= ~(SCTLR_C | SCTLR_M);
- write_sctlr(sctlr);
-}
-
-
-void dcache_mmu_enable(void)
-{
- uint32_t sctlr;
-
- sctlr = read_sctlr();
- dcache_clean_invalidate_all();
- sctlr |= SCTLR_C | SCTLR_M;
- write_sctlr(sctlr);
-}
-
-void armv7_invalidate_caches(void)
-{
- uint32_t clidr;
- int level;
-
- /* Invalidate branch predictor */
- bpiall();
-
- /* Iterate thru each cache identified in CLIDR and invalidate */
- clidr = read_clidr();
- for (level = 0; level < 7; level++) {
- unsigned int ctype = (clidr >> (level * 3)) & 0x7;
- uint32_t csselr;
-
- switch(ctype) {
- case 0x0:
- /* no cache */
- break;
- case 0x1:
- /* icache only */
- csselr = (level << 1) | 1;
- write_csselr(csselr);
- icache_invalidate_all();
- break;
- case 0x2:
- case 0x4:
- /* dcache only or unified cache */
- csselr = level << 1;
- write_csselr(csselr);
- dcache_invalidate_all();
- break;
- case 0x3:
- /* separate icache and dcache */
- csselr = (level << 1) | 1;
- write_csselr(csselr);
- icache_invalidate_all();
-
- csselr = level << 1;
- write_csselr(csselr);
- dcache_invalidate_all();
- break;
- default:
- /* reserved */
- break;
- }
- }
-
- /* Invalidate TLB */
- tlb_invalidate_all();
-}
diff --git a/src/console/Kconfig b/src/console/Kconfig
index 2ba359c..a649916 100644
--- a/src/console/Kconfig
+++ b/src/console/Kconfig
@@ -2,7 +2,7 @@
config BOOTBLOCK_CONSOLE
bool "Enable early (bootblock) console output."
- depends on ARCH_ARMV7
+ depends on ARCH_ARM
default n
help
Use console during the bootblock if supported
diff --git a/src/cpu/Kconfig b/src/cpu/Kconfig
index c66e3f4..6674163 100644
--- a/src/cpu/Kconfig
+++ b/src/cpu/Kconfig
@@ -1,7 +1,7 @@
# Warning: This file is included whether or not the if is here.
# The if controls how the evaluation occurs.
# (See also src/Kconfig)
-if ARCH_ARMV7
+if ARCH_ARM
source src/cpu/armltd/Kconfig
diff --git a/src/cpu/armltd/cortex-a9/Kconfig b/src/cpu/armltd/cortex-a9/Kconfig
index 04861a6..27f92be 100644
--- a/src/cpu/armltd/cortex-a9/Kconfig
+++ b/src/cpu/armltd/cortex-a9/Kconfig
@@ -1,5 +1,5 @@
config CPU_ARMLTD_CORTEX_A9
- depends on ARCH_ARMV7
+ depends on ARCH_ARM
bool
select EARLY_CONSOLE
default n
diff --git a/src/device/oprom/yabel/device.h b/src/device/oprom/yabel/device.h
index 017aab9..63f1d8e 100644
--- a/src/device/oprom/yabel/device.h
+++ b/src/device/oprom/yabel/device.h
@@ -128,7 +128,7 @@
static inline void
out32le(void *addr, u32 val)
{
-#if CONFIG_ARCH_X86 || CONFIG_ARCH_ARMV7
+#if CONFIG_ARCH_X86 || CONFIG_ARCH_ARM
*((u32*) addr) = cpu_to_le32(val);
#else
asm volatile ("stwbrx %0, 0, %1"::"r" (val), "r"(addr));
@@ -139,7 +139,7 @@
in32le(void *addr)
{
u32 val;
-#if CONFIG_ARCH_X86 || CONFIG_ARCH_ARMV7
+#if CONFIG_ARCH_X86 || CONFIG_ARCH_ARM
val = cpu_to_le32(*((u32 *) addr));
#else
asm volatile ("lwbrx %0, 0, %1":"=r" (val):"r"(addr));
@@ -150,7 +150,7 @@
static inline void
out16le(void *addr, u16 val)
{
-#if CONFIG_ARCH_X86 || CONFIG_ARCH_ARMV7
+#if CONFIG_ARCH_X86 || CONFIG_ARCH_ARM
*((u16*) addr) = cpu_to_le16(val);
#else
asm volatile ("sthbrx %0, 0, %1"::"r" (val), "r"(addr));
@@ -161,7 +161,7 @@
in16le(void *addr)
{
u16 val;
-#if CONFIG_ARCH_X86 || CONFIG_ARCH_ARMV7
+#if CONFIG_ARCH_X86 || CONFIG_ARCH_ARM
val = cpu_to_le16(*((u16*) addr));
#else
asm volatile ("lhbrx %0, 0, %1":"=r" (val):"r"(addr));
diff --git a/src/include/cbfs_core.h b/src/include/cbfs_core.h
index 20636e2..2dcf417 100644
--- a/src/include/cbfs_core.h
+++ b/src/include/cbfs_core.h
@@ -107,7 +107,7 @@
*/
#define CBFS_ARCHITECTURE_UNKNOWN 0xFFFFFFFF
#define CBFS_ARCHITECTURE_X86 0x00000001
-#define CBFS_ARCHITECTURE_ARMV7 0x00000010
+#define CBFS_ARCHITECTURE_ARM 0x00000010
/** This is a component header - every entry in the CBFS
will have this header.
diff --git a/src/lib/rmodule.c b/src/lib/rmodule.c
index 783aa0a..4d20bcb 100644
--- a/src/lib/rmodule.c
+++ b/src/lib/rmodule.c
@@ -60,9 +60,9 @@
return (void *)rel;
}
-#elif CONFIG_ARCH_ARMV7
+#elif CONFIG_ARCH_ARM
/*
- * On ARMv7, the only relocations currently allowed are R_ARM_RELATIVE which
+ * On ARM, the only relocations currently allowed are R_ARM_RELATIVE which
* have '0' for the symbol info in the relocation metadata (in r_info).
* The reason is that the module is fully linked and just has the relocations'
* locations.
diff --git a/src/mainboard/emulation/qemu-armv7/Kconfig b/src/mainboard/emulation/qemu-armv7/Kconfig
index 5ca709d..dc89a3e 100644
--- a/src/mainboard/emulation/qemu-armv7/Kconfig
+++ b/src/mainboard/emulation/qemu-armv7/Kconfig
@@ -23,7 +23,7 @@
config BOARD_SPECIFIC_OPTIONS # dummy
def_bool y
- select ARCH_ARMV7
+ select ARCH_ARM
select CPU_ARMLTD_CORTEX_A9
select HAVE_UART_MEMORY_MAPPED
select HAVE_UART_SPECIAL
diff --git a/src/mainboard/google/kirby/Kconfig b/src/mainboard/google/kirby/Kconfig
index a756078..17af778 100644
--- a/src/mainboard/google/kirby/Kconfig
+++ b/src/mainboard/google/kirby/Kconfig
@@ -21,7 +21,7 @@
config BOARD_SPECIFIC_OPTIONS # dummy
def_bool y
- select ARCH_ARMV7
+ select ARCH_ARM
select CPU_SAMSUNG_EXYNOS5420
select HAVE_UART_MEMORY_MAPPED
select EC_GOOGLE_CHROMEEC
diff --git a/src/mainboard/google/nyan/Kconfig b/src/mainboard/google/nyan/Kconfig
index 26794b6..b1f1ca3 100644
--- a/src/mainboard/google/nyan/Kconfig
+++ b/src/mainboard/google/nyan/Kconfig
@@ -21,7 +21,7 @@
config BOARD_SPECIFIC_OPTIONS # dummy
def_bool y
- select ARCH_ARMV7
+ select ARCH_ARM
select SOC_NVIDIA_TEGRA124
config MAINBOARD_DIR
diff --git a/src/mainboard/google/pit/Kconfig b/src/mainboard/google/pit/Kconfig
index 89ffb5b..668d8e6 100644
--- a/src/mainboard/google/pit/Kconfig
+++ b/src/mainboard/google/pit/Kconfig
@@ -21,7 +21,7 @@
config BOARD_SPECIFIC_OPTIONS # dummy
def_bool y
- select ARCH_ARMV7
+ select ARCH_ARM
select CPU_SAMSUNG_EXYNOS5420
select HAVE_UART_MEMORY_MAPPED
select EC_GOOGLE_CHROMEEC
diff --git a/src/mainboard/google/snow/Kconfig b/src/mainboard/google/snow/Kconfig
index 91bd66d..90a6cc0 100644
--- a/src/mainboard/google/snow/Kconfig
+++ b/src/mainboard/google/snow/Kconfig
@@ -21,7 +21,7 @@
config BOARD_SPECIFIC_OPTIONS # dummy
def_bool y
- select ARCH_ARMV7
+ select ARCH_ARM
select CPU_SAMSUNG_EXYNOS5250
select HAVE_UART_MEMORY_MAPPED
select EC_GOOGLE_CHROMEEC
diff --git a/src/soc/Kconfig b/src/soc/Kconfig
index 56d0c2b..09c0f74 100644
--- a/src/soc/Kconfig
+++ b/src/soc/Kconfig
@@ -1,10 +1,7 @@
-if ARCH_ARMV7
-source src/soc/samsung/Kconfig
-endif
-
if ARCH_X86
source src/soc/intel/Kconfig
endif
-if ARCH_ARMV7
+if ARCH_ARM
source src/soc/nvidia/Kconfig
+source src/soc/samsung/Kconfig
endif
diff --git a/src/soc/nvidia/tegra124/Kconfig b/src/soc/nvidia/tegra124/Kconfig
index c2a40e9..c789245 100644
--- a/src/soc/nvidia/tegra124/Kconfig
+++ b/src/soc/nvidia/tegra124/Kconfig
@@ -1,5 +1,5 @@
config SOC_NVIDIA_TEGRA124
- depends on ARCH_ARMV7
+ depends on ARCH_ARM
bool
default n
select HAVE_UART_MEMORY_MAPPED
diff --git a/src/soc/nvidia/tegra124/bootblock_asm.S b/src/soc/nvidia/tegra124/bootblock_asm.S
index 8d0beb8..5f7de13 100644
--- a/src/soc/nvidia/tegra124/bootblock_asm.S
+++ b/src/soc/nvidia/tegra124/bootblock_asm.S
@@ -1,5 +1,5 @@
/*
- * Early initialization code for ARMv7 architecture.
+ * Early initialization code for ARM architecture.
*
* This file is based off of the OMAP3530/ARM Cortex start.S file from Das
* U-Boot, which itself got the file from armboot.
diff --git a/src/soc/samsung/exynos5250/Kconfig b/src/soc/samsung/exynos5250/Kconfig
index e2c6f92..99966f5 100644
--- a/src/soc/samsung/exynos5250/Kconfig
+++ b/src/soc/samsung/exynos5250/Kconfig
@@ -1,5 +1,5 @@
config CPU_SAMSUNG_EXYNOS5250
- depends on ARCH_ARMV7
+ depends on ARCH_ARM
select CPU_HAS_BOOTBLOCK_INIT
select HAVE_MONOTONIC_TIMER
select HAVE_UART_SPECIAL
diff --git a/src/soc/samsung/exynos5420/Kconfig b/src/soc/samsung/exynos5420/Kconfig
index 168cfea..a60636a 100644
--- a/src/soc/samsung/exynos5420/Kconfig
+++ b/src/soc/samsung/exynos5420/Kconfig
@@ -1,5 +1,5 @@
config CPU_SAMSUNG_EXYNOS5420
- depends on ARCH_ARMV7
+ depends on ARCH_ARM
select CPU_HAS_BOOTBLOCK_INIT
select HAVE_MONOTONIC_TIMER
select HAVE_UART_SPECIAL
diff --git a/src/vendorcode/google/chromeos/Makefile.inc b/src/vendorcode/google/chromeos/Makefile.inc
index c134de6..91c9939 100644
--- a/src/vendorcode/google/chromeos/Makefile.inc
+++ b/src/vendorcode/google/chromeos/Makefile.inc
@@ -21,8 +21,8 @@
ramstage-y += chromeos.c
romstage-$(CONFIG_ARCH_X86) += vbnv_cmos.c
ramstage-$(CONFIG_ARCH_X86) += vbnv_cmos.c
-romstage-$(CONFIG_ARCH_ARMV7) += vbnv_ec.c
-ramstage-$(CONFIG_ARCH_ARMV7) += vbnv_ec.c
+romstage-$(CONFIG_ARCH_ARM) += vbnv_ec.c
+ramstage-$(CONFIG_ARCH_ARM) += vbnv_ec.c
romstage-$(CONFIG_ARCH_X86) += vboot.c
ramstage-y += gnvs.c
romstage-y += fmap.c
@@ -61,9 +61,9 @@
VBOOT_STUB_DEPS += $(obj)/arch/x86/lib/memset.rmodules.o
VBOOT_STUB_DEPS += $(obj)/arch/x86/lib/memcpy.rmodules.o
endif
-ifeq ($(CONFIG_ARCH_ARMV7),y)
-VBOOT_STUB_DEPS += $(obj)/arch/armv7/memset.rmodules.o
-VBOOT_STUB_DEPS += $(obj)/arch/armv7/memcpy.rmodules.o
+ifeq ($(CONFIG_ARCH_ARM),y)
+VBOOT_STUB_DEPS += $(obj)/arch/arm/memset.rmodules.o
+VBOOT_STUB_DEPS += $(obj)/arch/arm/memcpy.rmodules.o
endif
VBOOT_STUB_DEPS += $(VB_LIB)
# Remove the '-include' option since that will break vboot's build and ensure
diff --git a/src/vendorcode/google/chromeos/fmap.c b/src/vendorcode/google/chromeos/fmap.c
index e0ec30b..bc56a19 100644
--- a/src/vendorcode/google/chromeos/fmap.c
+++ b/src/vendorcode/google/chromeos/fmap.c
@@ -41,7 +41,7 @@
/* wrapping around 0x100000000 */
const struct fmap *fmap = (void *)
(CONFIG_FLASHMAP_OFFSET - CONFIG_ROM_SIZE);
-#elif CONFIG_ARCH_ARMV7
+#elif CONFIG_ARCH_ARM
struct cbfs_media default_media, *media;
media = &default_media;
init_default_cbfs_media(media);
diff --git a/src/vendorcode/google/chromeos/vboot_loader.c b/src/vendorcode/google/chromeos/vboot_loader.c
index 97178f6..c78f65d 100644
--- a/src/vendorcode/google/chromeos/vboot_loader.c
+++ b/src/vendorcode/google/chromeos/vboot_loader.c
@@ -244,7 +244,7 @@
"jmp *%%edi\n"
:: "D"(entry_point)
);
-#elif CONFIG_ARCH_ARMV7
+#elif CONFIG_ARCH_ARM
stage_exit(entry_point);
#endif
}
diff --git a/util/abuild/abuild b/util/abuild/abuild
index 1c69eec..c8b0d29 100755
--- a/util/abuild/abuild
+++ b/util/abuild/abuild
@@ -356,7 +356,7 @@
fi
done
fi
- if [ "$found_crosscompiler" == "false" -a "$TARCH" == ARMV7 ];then
+ if [ "$found_crosscompiler" == "false" -a "$TARCH" == ARM ];then
for prefix in armv7a-eabi- armv7a-cros-linux-gnueabi-; do
if ${prefix}gcc --version > /dev/null 2> /dev/null ; then
found_crosscompiler=true
diff --git a/util/cbfstool/cbfs-mkpayload.c b/util/cbfstool/cbfs-mkpayload.c
index 9f3dabf..6b7176d 100644
--- a/util/cbfstool/cbfs-mkpayload.c
+++ b/util/cbfstool/cbfs-mkpayload.c
@@ -51,7 +51,7 @@
// The tool may work in architecture-independent way.
if (arch != CBFS_ARCHITECTURE_UNKNOWN &&
- !((ehdr->e_machine == EM_ARM) && (arch == CBFS_ARCHITECTURE_ARMV7)) &&
+ !((ehdr->e_machine == EM_ARM) && (arch == CBFS_ARCHITECTURE_ARM)) &&
!((ehdr->e_machine == EM_386) && (arch == CBFS_ARCHITECTURE_X86))) {
ERROR("The payload file has the wrong architecture\n");
return -1;
diff --git a/util/cbfstool/cbfs-mkstage.c b/util/cbfstool/cbfs-mkstage.c
index 4008367..4fdb2ce 100644
--- a/util/cbfstool/cbfs-mkstage.c
+++ b/util/cbfstool/cbfs-mkstage.c
@@ -70,7 +70,7 @@
// The tool may work in architecture-independent way.
if (arch != CBFS_ARCHITECTURE_UNKNOWN &&
- !((ehdr->e_machine == EM_ARM) && (arch == CBFS_ARCHITECTURE_ARMV7)) &&
+ !((ehdr->e_machine == EM_ARM) && (arch == CBFS_ARCHITECTURE_ARM)) &&
!((ehdr->e_machine == EM_386) && (arch == CBFS_ARCHITECTURE_X86))) {
ERROR("The stage file has the wrong architecture\n");
return -1;
diff --git a/util/cbfstool/cbfs.h b/util/cbfstool/cbfs.h
index 35d0670..1890a33 100644
--- a/util/cbfstool/cbfs.h
+++ b/util/cbfstool/cbfs.h
@@ -40,7 +40,7 @@
#define CBFS_ARCHITECTURE_UNKNOWN 0xFFFFFFFF
#define CBFS_ARCHITECTURE_X86 0x00000001
-#define CBFS_ARCHITECTURE_ARMV7 0x00000010
+#define CBFS_ARCHITECTURE_ARM 0x00000010
#define CBFS_FILE_MAGIC "LARCHIVE"
diff --git a/util/cbfstool/cbfstool.c b/util/cbfstool/cbfstool.c
index bd34960..3f84ac3 100644
--- a/util/cbfstool/cbfstool.c
+++ b/util/cbfstool/cbfstool.c
@@ -514,7 +514,7 @@
"Updates the FIT table with microcode entries\n"
"\n"
"ARCHes:\n"
- " armv7, x86\n"
+ " arm, x86\n"
"TYPEs:\n", name, name
);
print_supported_filetypes();
diff --git a/util/cbfstool/common.c b/util/cbfstool/common.c
index aa98696..beca068 100644
--- a/util/cbfstool/common.c
+++ b/util/cbfstool/common.c
@@ -154,7 +154,7 @@
uint32_t arch;
const char *name;
} arch_names[] = {
- { CBFS_ARCHITECTURE_ARMV7, "armv7" },
+ { CBFS_ARCHITECTURE_ARM, "arm" },
{ CBFS_ARCHITECTURE_X86, "x86" },
{ CBFS_ARCHITECTURE_UNKNOWN, "unknown" }
};
@@ -226,7 +226,7 @@
arch = ntohl(master_header->architecture);
switch (arch) {
- case CBFS_ARCHITECTURE_ARMV7:
+ case CBFS_ARCHITECTURE_ARM:
offset = romarea;
phys_start = (0 + ntohl(master_header->offset)) & 0xffffffff;
phys_end = romsize & 0xffffffff;
@@ -693,7 +693,7 @@
// TODO(hungte) Replace magic numbers by named constants.
switch (arch) {
- case CBFS_ARCHITECTURE_ARMV7:
+ case CBFS_ARCHITECTURE_ARM:
/* Set up physical/virtual mapping */
offset = romarea;
@@ -731,7 +731,7 @@
master_header->align = htonl(align);
master_header->offset = htonl(
ALIGN((0x40 + bootblocksize), align));
- master_header->architecture = htonl(CBFS_ARCHITECTURE_ARMV7);
+ master_header->architecture = htonl(CBFS_ARCHITECTURE_ARM);
((uint32_t *) phys_to_virt(0x4 + offs))[0] =
virt_to_phys(master_header);
diff --git a/util/runfw/googlesnow.c b/util/runfw/googlesnow.c
index 686b4bc..125e0a2 100644
--- a/util/runfw/googlesnow.c
+++ b/util/runfw/googlesnow.c
@@ -114,7 +114,7 @@
1: x/i $pc
=> 0x20234bc <call_bootblock+12>: blx 0x20244b8 <main>
(gdb)
-main (bist=0) at src/arch/armv7/bootblock_simple.c:37
+main (bist=0) at src/arch/arm/bootblock_simple.c:37
37 {
1: x/i $pc
=> 0x20244b8 <main>: push {r3, lr}
diff --git a/util/showdevicetree/showdt.c b/util/showdevicetree/showdt.c
index dc4e4d6..4e904a2 100644
--- a/util/showdevicetree/showdt.c
+++ b/util/showdevicetree/showdt.c
@@ -165,5 +165,5 @@
* Example: (yank this and paste into M-x compile in emacs)
* or tail -2 showdt.c | head -1 |sh
* or whatever.
- cc -I ../src -I ../src/include -I ../src/arch/armv7/include/ -include build/mainboard/google/snow/static.c showdt.c
+ cc -I ../src -I ../src/include -I ../src/arch/arm/include/ -include build/mainboard/google/snow/static.c showdt.c
*/
diff --git a/util/xcompile/xcompile b/util/xcompile/xcompile
index 43b98e3..8eea8cb 100644
--- a/util/xcompile/xcompile
+++ b/util/xcompile/xcompile
@@ -107,7 +107,7 @@
testcc "$CC" "$CFLAGS -fuse-ld=bfd" &&
CFLAGS="$CFLAGS -fuse-ld=bfd" && LINKER_SUFFIX_i386='.bfd'
;;
- armv7 )
+ arm )
ARMFLAGS=""
testcc "$CC" "$CFLAGS $ARMFLAGS" && CFLAGS="$CFLAGS $ARMFLAGS"
;;
@@ -136,13 +136,13 @@
trap clean_up EXIT
# Architecture definition
-SUPPORTED_ARCHITECTURE="x86 armv7"
+SUPPORTED_ARCHITECTURE="x86 arm"
# ARM Architecture
-TARCH_armv7="armv7"
-TBFDARCH_armv7="littlearm"
-TCLIST_armv7="armv7a"
-TWIDTH_armv7="32"
+TARCH_arm="arm"
+TBFDARCH_arm="littlearm"
+TCLIST_arm="armv7a"
+TWIDTH_arm="32"
# X86 Architecture
TARCH_x86="i386"
