tegra124: Add base address for the pinmux and pingroup registers.

There weren't any constants for the pinmux or pingroup registers in the
address map header.

BUG=None
TEST=Built and booted into the bootblock on nyan.
BRANCH=None

Change-Id: I52b9042c7506cab0bedd7a734f346cc9fe4ac3fe
Signed-off-by: Gabe Black <gabeblack@google.com>
Reviewed-on: https://chromium-review.googlesource.com/172081
Reviewed-by: Julius Werner <jwerner@chromium.org>
Tested-by: Gabe Black <gabeblack@chromium.org>
Commit-Queue: Gabe Black <gabeblack@chromium.org>
diff --git a/src/soc/nvidia/tegra124/include/soc/addressmap.h b/src/soc/nvidia/tegra124/include/soc/addressmap.h
index edacf15..2fd607d 100644
--- a/src/soc/nvidia/tegra124/include/soc/addressmap.h
+++ b/src/soc/nvidia/tegra124/include/soc/addressmap.h
@@ -36,6 +36,8 @@
 	TEGRA_EVP_BASE =		0x6000F000,
 	TEGRA_APB_MISC_BASE =		0x70000000,
 	TEGRA_APB_MISC_GP_BASE =	TEGRA_APB_MISC_BASE + 0x0800,
+	TEGRA_APB_PINGROUP_BASE =	TEGRA_APB_MISC_BASE + 0x0868,
+	TEGRA_APB_PINMUX_BASE =		TEGRA_APB_MISC_BASE + 0x3000,
 	TEGRA_APB_UARTA_BASE =		TEGRA_APB_MISC_BASE + 0x6000,
 	TEGRA_APB_UARTB_BASE =		TEGRA_APB_MISC_BASE + 0x6040,
 	TEGRA_APB_UARTC_BASE =		TEGRA_APB_MISC_BASE + 0x6200,