| commit | 351df744311894d28a1da33122968f5dfca121e9 | [log] [tgz] |
|---|---|---|
| author | Aamir Bohra <aamir.bohra@intel.com> | Thu May 25 14:12:01 2017 +0530 |
| committer | chrome-bot <chrome-bot@chromium.org> | Mon Jun 05 18:33:54 2017 -0700 |
| tree | 9e4fec8d09345fb2c0f9304011079aee347509da | |
| parent | 94ce9dbbc976213fd5b07d87e5c9bb281cfc117c [diff] |
UPSTREAM: soc/intel/skylake: Use Intel timer common code Use timer code from soc/intel/common. This code removes monotonic timer refrence w.r.t MSR 24Mhz counter(0x637) and use tsc timer. BUG=none BRANCH=none TEST=none Change-Id: I683f57a57f0de9c99b7be984250f0aa408886e4e Signed-off-by: Patrick Georgi <pgeorgi@chromium.org> Original-Commit-Id: 842776e1dcb310e889d2ba922be9d7b81a1c2dd0 Original-Change-Id: I7fad620b11c9e5db128f646639c79ea58a0a574f Original-Signed-off-by: Aamir Bohra <aamir.bohra@intel.com> Original-Reviewed-on: https://review.coreboot.org/19912 Original-Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/524603