chip northbridge/intel/haswell

	# Enable DisplayPort 1 Hotplug with 6ms pulse
	register "gpu_dp_d_hotplug" = "0x06"

	# Enable DisplayPort 0 Hotplug with 6ms pulse
	register "gpu_dp_c_hotplug" = "0x06"

	# Enable DVI Hotplug with 6ms pulse
	register "gpu_dp_b_hotplug" = "0x06"

	device cpu_cluster 0 on
		chip cpu/intel/socket_rPGA989
			device lapic 0 on end
		end
		chip cpu/intel/haswell
			# Magic APIC ID to locate this chip
			device lapic 0xACAC off end

			register "c1_battery" = "2"	# ACPI(C1) = MWAIT(C1E)
			register "c2_battery" = "3"	# ACPI(C2) = MWAIT(C3)
			register "c3_battery" = "9"	# ACPI(C3) = MWAIT(C7S)

			register "c1_acpower" = "2"	# ACPI(C1) = MWAIT(C1E)
			register "c2_acpower" = "3"	# ACPI(C2) = MWAIT(C3)
			register "c3_acpower" = "9"	# ACPI(C3) = MWAIT(C7S)
		end
	end

	device domain 0 on
		device pci 00.0 on end # host bridge
		device pci 02.0 on end # vga controller

		chip southbridge/intel/lynxpoint # Intel Series 8 Lynx Point PCH
			register "pirqa_routing" = "0x8b"
			register "pirqb_routing" = "0x8a"
			register "pirqc_routing" = "0x8b"
			register "pirqd_routing" = "0x8b"
			register "pirqe_routing" = "0x80"
			register "pirqf_routing" = "0x80"
			register "pirqg_routing" = "0x80"
			register "pirqh_routing" = "0x80"

			# GPI routing
			#  0 No effect (default)
			#  1 SMI# (if corresponding ALT_GPI_SMI_EN bit is also set)
			#  2 SCI (if corresponding GPIO_EN bit is also set)
			register "gpi1_routing" = "1"
			register "gpi14_routing" = "2"
			register "alt_gp_smi_en" = "0x0000"
			register "gpe0_en_1" = "0x4000"

			register "ide_legacy_combined" = "0x0"
			register "sata_ahci" = "0x1"
			register "sata_port_map" = "0x3f"

			# SuperIO range is 0x700-0x73f
			register "gen2_dec" = "0x003c0701"

			device pci 16.0 on end # Management Engine Interface 1
			device pci 16.1 off end # Management Engine Interface 2
			device pci 16.2 off end # Management Engine IDE-R
			device pci 16.3 off end # Management Engine KT
			device pci 19.0 off end # Intel Gigabit Ethernet
			device pci 1a.0 on end # USB2 EHCI #2
			device pci 1b.0 on end # High Definition Audio
			device pci 1c.0 on end # PCIe Port #1 (WLAN)
			device pci 1c.1 off end # PCIe Port #2
			device pci 1c.2 on end # PCIe Port #3 (Debug)
			device pci 1c.3 on end # PCIe Port #4 (LAN)
			device pci 1c.4 off end # PCIe Port #5
			device pci 1c.5 off end # PCIe Port #6
			device pci 1c.6 off end # PCIe Port #7
			device pci 1c.7 off end # PCIe Port #8
			device pci 1d.0 on end # USB2 EHCI #1
			device pci 1e.0 off end # PCI bridge
			device pci 1f.0 on end # LPC bridge
			device pci 1f.2 on end # SATA Controller 1
			device pci 1f.3 on end # SMBus
			device pci 1f.5 off end # SATA Controller 2
			device pci 1f.6 on end # Thermal
		end
	end
end