| chip northbridge/amd/amdk8/root_complex |
| device cpu_cluster 0 on |
| chip cpu/amd/socket_940 |
| device lapic 0 on end |
| end |
| end |
| device domain 0 on |
| chip northbridge/amd/amdk8 |
| device pci 18.0 on # northbridge |
| # devices on link 0, link 0 == LDT 0 |
| chip southbridge/amd/amd8131 |
| # the on/off keyword is mandatory |
| device pci 0.0 on end |
| device pci 0.1 on end |
| device pci 1.0 on end |
| device pci 1.1 on end |
| end |
| chip southbridge/amd/amd8111 |
| # this "device pci 0.0" is the parent the next one |
| # PCI bridge |
| device pci 0.0 on |
| device pci 0.0 on end |
| device pci 0.1 on end |
| device pci 0.2 on end |
| device pci 1.0 off end |
| end |
| device pci 1.0 on |
| # TODO: This is incomplete. |
| chip superio/winbond/w83627thg |
| device pnp 2e.0 on end |
| device pnp 2e.1 on end |
| device pnp 2e.2 on end |
| device pnp 2e.3 on end |
| device pnp 2e.5 on end |
| device pnp 2e.7 on end |
| device pnp 2e.8 on end |
| device pnp 2e.9 on end |
| device pnp 2e.a on end |
| device pnp 2e.b on end |
| end |
| end |
| device pci 1.1 on end |
| device pci 1.2 on end |
| device pci 1.3 on end |
| device pci 1.5 off end |
| device pci 1.6 off end |
| end |
| end # LDT0 |
| device pci 18.0 on end # LDT1 |
| device pci 18.0 on end # LDT2 |
| device pci 18.1 on end |
| device pci 18.2 on end |
| device pci 18.3 on end |
| end |
| end |
| end |
| |