firmware/bdb/secrets.h

/* Copyright 2016 The Chromium OS Authors. All rights reserved.
 * Use of this source code is governed by a BSD-style license that can be
 * found in the LICENSE file.
 */

#ifndef VBOOT_REFERENCE_FIRMWARE_BDB_SECRETS_H_
#define VBOOT_REFERENCE_FIRMWARE_BDB_SECRETS_H_

#define BDB_SECRET_SIZE		32
#define BDB_CONSTANT_BLOCK_SIZE	64

const uint8_t secret_constant_c[] = {
	0x46, 0xda, 0x52, 0x8d, 0x08, 0x56, 0x14, 0xde, 0x75, 0x9c,
	0x9a, 0xeb, 0x08, 0x93, 0x3d, 0xd6, 0xc6, 0xc6, 0xc6, 0xc6,
	0xc6, 0xc6, 0xc6, 0xc6, 0xc6, 0xc6, 0xc6, 0xc6, 0xc6, 0xc6,
	0xc6, 0xc6, 0xc6, 0xc6, 0xc6, 0xc6, 0xc6, 0xc6, 0xc6, 0xc6,
	0xc6, 0xc6, 0xc6, 0xc6, 0xc6, 0xc6, 0xc6, 0xc6, 0xc6, 0xc6,
	0xc6, 0xc6, 0xc6, 0xc6, 0xc6, 0xc6, 0xc6, 0xc6, 0xc6, 0xc6,
	0xc6, 0xc6, 0xc6, 0x0b};

const uint8_t secret_constant_kv1[] = {
	0x0a, 0x9e, 0xc9, 0x20, 0x29, 0xa3, 0x5d, 0xd7, 0x27, 0x55,
	0xb6, 0xa6, 0xb4, 0x80, 0x7c, 0x73, 0xc6, 0xc6, 0xc6, 0xc6,
	0xc6, 0xc6, 0xc6, 0xc6, 0xc6, 0xc6, 0xc6, 0xc6, 0xc6, 0xc6,
	0xc6, 0xc6, 0xc6, 0xc6, 0xc6, 0xc6, 0xc6, 0xc6, 0xc6, 0xc6,
	0xc6, 0xc6, 0xc6, 0xc6, 0xc6, 0xc6, 0xc6, 0xc6, 0xc6, 0xc6,
	0xc6, 0xc6, 0xc6, 0xc6, 0xc6, 0xc6, 0xc6, 0xc6, 0xc6, 0xc6,
	0xc6, 0xc6, 0xc6, 0x08};

const uint8_t secret_constant_kv0[] = {
	0x46, 0x6d, 0xef, 0x2c, 0x05, 0xc9, 0xbf, 0xa9, 0x6b, 0xee,
	0xaa, 0x6c, 0xb9, 0xb4, 0x6d, 0x37, 0xc6, 0xc6, 0xc6, 0xc6,
	0xc6, 0xc6, 0xc6, 0xc6, 0xc6, 0xc6, 0xc6, 0xc6, 0xc6, 0xc6,
	0xc6, 0xc6, 0xc6, 0xc6, 0xc6, 0xc6, 0xc6, 0xc6, 0xc6, 0xc6,
	0xc6, 0xc6, 0xc6, 0xc6, 0xc6, 0xc6, 0xc6, 0xc6, 0xc6, 0xc6,
	0xc6, 0xc6, 0xc6, 0xc6, 0xc6, 0xc6, 0xc6, 0xc6, 0xc6, 0xc6,
	0xc6, 0xc6, 0xc6, 0x07};

const uint8_t secret_constant_l[] = {
	/*
	 * Digest of kernel data key struct fills first 32 bytes
	 */
	            0x9b, 0xc0, 0x29, 0xd3, 0xc3, 0x90, 0x7f, 0x82,
	0x56, 0xe2, 0x67, 0x79, 0x11, 0x74, 0xbe, 0xd0, 0xc6, 0xc6,
	0xc6, 0xc6, 0xc6, 0xc6, 0xc6, 0xc6, 0xc6, 0xc6, 0xc6, 0xc6,
	0xc6, 0xc6, 0xc6, 0x04};

const uint8_t secret_constant_q[] = {
	/*
	 * Digest of KDB key struct fills first 32 bytes
	 */
	            0xc7, 0x60, 0x83, 0x0f, 0x20, 0x44, 0x5d, 0x9c,
	0x70, 0x96, 0x05, 0x2d, 0x51, 0x4b, 0x15, 0x99, 0xc6, 0xc6,
	0xc6, 0xc6, 0xc6, 0xc6, 0xc6, 0xc6, 0xc6, 0xc6, 0xc6, 0xc6,
	0xc6, 0xc6, 0xc6, 0x0d};

enum bdb_secret_type {
	BDB_SECRET_TYPE_WSR,
	BDB_SECRET_TYPE_NVM_WP,
	BDB_SECRET_TYPE_NVM_RW,
	BDB_SECRET_TYPE_BDB,
	BDB_SECRET_TYPE_BOOT_VERIFIED,
	BDB_SECRET_TYPE_BOOT_PATH,
	BDB_SECRET_TYPE_BUC,
	BDB_SECRET_TYPE_COUNT,	/* Last entry. Add new secrets before this. */
};

/*
 * Secrets passed to SP-RW by SP-RO. How it's passed depends on chips.
 * These are hash-extended by SP-RW.
 */
struct bdb_ro_secrets {
	uint8_t nvm_wp[BDB_SECRET_SIZE];
	uint8_t nvm_rw[BDB_SECRET_SIZE];
	uint8_t bdb[BDB_SECRET_SIZE];
	uint8_t boot_verified[BDB_SECRET_SIZE];
	uint8_t boot_path[BDB_SECRET_SIZE];
};

/*
 * Additional secrets SP-RW derives from RO secrets. This can be independently
 * updated as more secrets are needed.
 */
struct bdb_rw_secrets {
	uint8_t buc[BDB_SECRET_SIZE];
};

#endif