bundle_firmware: Coalesce BOOTBLOCK and COREBOOT sections for cbf
CL:371279 changed the FMAP source of truth from fmap.dts to
chromeos.fmd. It did an accurate job of translating one format into the
other, but unfortunately it didn't take into account that both FMAPs
aren't exactly the same.
chromeos.fmd splits a separate BOOTBLOCK section out of COREBOOT (which
is important for coreboot itself to correctly place the bootblock in the
image). fmap.dts and cros_bundle_firmware still rely on COREBOOT (which
it calls 'ro-boot' because cros_bundle_firmware likes everything to be
lowercase and different for no particular reason) to be a single,
all-encompassing section that is the only part it carries over from
coreboot.rom to image.bin, though. By having the bootblock in a separate
section, that part of our image ends up filled with zeroes by the time
cros_bundle_firmware is done with it.
While the proper solution would be to kill cros_bundle_firmware with
fire, we need something immediate to unbreak our build system until we
have more time for the real cleanup. This patch hacks up the
FMAP-to-fdtmap translator to coalesce sections called BOOTBLOCK and
COREBOOT into one if they immediately follow each other.
BUG=none
TEST=Built Kevin.
Change-Id: I290d220d59077f46dc04351087bc79a7feae0b77
Signed-off-by: Julius Werner <jwerner@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/382631
Tested-by: Patrick Georgi <pgeorgi@chromium.org>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
diff --git a/host/lib/bundle_firmware.py b/host/lib/bundle_firmware.py
index b0ab43b..0b18cc5 100644
--- a/host/lib/bundle_firmware.py
+++ b/host/lib/bundle_firmware.py
@@ -1149,6 +1149,8 @@
# fill in /flash from binary fmap
# ignore "read-only" attribute, that isn't used anywhere
+ bootblock_range = None
+ coreboot_range = None
fmap_blob = open(self.coreboot_fname).read()
f = fmap.fmap_decode(fmap_blob)
fdt.PutString('/flash', 'compatible', 'chromeos,flashmap')
@@ -1165,9 +1167,12 @@
fdt.PutString(fdt_path, 'type', 'fmap')
fdt.PutIntList(fdt_path, 'ver-major', [1])
fdt.PutIntList(fdt_path, 'ver-minor', [0])
+ elif label == 'bootblock':
+ bootblock_range = [area['offset'], area['size']]
+ continue
elif label == 'coreboot':
- fdt_path = '/flash/ro-boot'
- fdt.PutString(fdt_path, 'type', 'blob coreboot')
+ coreboot_range = [area['offset'], area['size']]
+ continue
elif label == 'si-desc':
fdt.PutString(fdt_path, 'type', 'ifd')
elif label == 'rw-shared':
@@ -1223,6 +1228,17 @@
fdt.PutString(fdt_path, 'label', label)
fdt.PutIntList(fdt_path, 'reg', [area['offset'], area['size']])
+ if coreboot_range is not None:
+ if bootblock_range is not None:
+ if bootblock_range[0] + bootblock_range[1] != coreboot_range[0]:
+ raise ValueError('Cannot combine BOOTBLOCK and COREBOOT')
+ coreboot_range[0] = bootblock_range[0]
+ coreboot_range[1] += bootblock_range[1]
+ fdt_path = '/flash/ro-boot'
+ fdt.PutString(fdt_path, 'type', 'blob coreboot')
+ fdt.PutString(fdt_path, 'label', 'coreboot')
+ fdt.PutIntList(fdt_path, 'reg', [coreboot_range[0], coreboot_range[1]])
+
# Remember our board type.
fdt.PutString('/chromeos-config', 'board', self._board)
