commit | 03a859aab021935aaffd3e41e167ca04c1d5afa6 | [log] [tgz] |
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author | Pin-chih Lin <johnylin@google.com> | Fri Dec 13 12:02:15 2019 +0800 |
committer | Commit Bot <commit-bot@chromium.org> | Fri Dec 13 09:29:00 2019 +0000 |
tree | 0178454c58739df0d5a301886f6eb96f746d250b | |
parent | c93fa162a5479e87ebaa0d23fd13e84dd8810a78 [diff] |
chipset-bdw: adjust ARC++P HW decoder perf values for auron boards Auron boards, which have the lower-bound SKU among Broadwell chipsets, have failed CTS tests of HW decoder performance after kernel and ARC++P rollout. This CL modifies performance XML to adjust those values. BUG=b:145256708 TEST=emerge-auron_paine -a arc-codec Change-Id: I2781327f9bfe4eb650942b16d9cacefcd482fb0f Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/overlays/board-overlays/+/1966543 Reviewed-by: Hirokazu Honda <hiroh@chromium.org> Commit-Queue: Pin-chih Lin <johnylin@chromium.org> Tested-by: Pin-chih Lin <johnylin@chromium.org> Auto-Submit: Pin-chih Lin <johnylin@chromium.org> (cherry picked from commit d0f0d944c05f522841ee87ab781bfae7676aa96f) Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/overlays/board-overlays/+/1966980 Reviewed-by: Kazuhiro Inaba <kinaba@chromium.org> Commit-Queue: Kazuhiro Inaba <kinaba@chromium.org> Tested-by: Kazuhiro Inaba <kinaba@chromium.org> Auto-Submit: Kazuhiro Inaba <kinaba@chromium.org>